Monolithic integrated optical time delay network for antenna beam steering
First Claim
1. A monolithically integrated time delay network, comprising:
- a semiconductor substrate,an optical waveguide time delay network comprising a plurality of cascaded optical time delay stages on said substrate,switch means for adjusting the time delay of said optical waveguide time delay network,an input optical means for directing an input optical beam into said network,means for modulating said optical beam in accordance with a modulating signal, anda photodetector for detecting the delayed optical output from said waveguide delay network and transducing said output to an output electrical signal,said optical waveguide time delay network, switch means, optical means, modulating means and photodetector being monolithically integrated on said substrate.
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Abstract
A time delay network for phased array antenna beam steering employs a waveguide network as the delay element in a monolithic integration with other optical and electronic elements on a single substrate. A plurality of optical time delay stages are cascaded to form the delay network, with each stage having a selectable delay time. Each stage preferably has a reference or nominal time delay branch, and at least one other finite time delay branch. The lengths of the delay waveguides vary from stage to stage, permitting a high time delay resolution with a relatively small number of separate waveguides. The desired time delay is selected either by directing the modulated laser light into only one of the waveguide branches in each stage by means of waveguide switches or by splitting the light into all the waveguide branches of a stage and then activating only the detector connected to the desired delay waveguide. A variety of cascading schemes and waveguide layouts can be used to implement the time delay network.
67 Citations
25 Claims
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1. A monolithically integrated time delay network, comprising:
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a semiconductor substrate, an optical waveguide time delay network comprising a plurality of cascaded optical time delay stages on said substrate, switch means for adjusting the time delay of said optical waveguide time delay network, an input optical means for directing an input optical beam into said network, means for modulating said optical beam in accordance with a modulating signal, and a photodetector for detecting the delayed optical output from said waveguide delay network and transducing said output to an output electrical signal, said optical waveguide time delay network, switch means, optical means, modulating means and photodetector being monolithically integrated on said substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A monolithically integrated time delay network, comprising:
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a semiconductor substrate, an optical waveguide time delay network, switch means for adjusting the time delay of said network, an input optical means for directing an input optical beam into said network, means for modulating said optical beam in accordance with a modulating signal, and a photodetector for detecting the delayed optical output from said waveguide delay network and transducing it to an output electrical signal, said optical waveguide time delay network, switch means, optical means, modulating means and photodetector being monolithically integrated on said substrate, and said optical waveguide time delay network comprising a plurality of individually switchable multibranch delay stages, and further comprising said switch means which direct said input optical beam through specified branches of said delay stages, said delayed optical output having the accumulated delay from propagation through said specified delay stage branches.
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9. A monolithic integrated time delay network, comprising:
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a semiconductor substrate, a plurality of cascaded optical time delay stages on said substrate, each of said stages having a respective plurality of different selectable delay times, said network providing an overall time delay for said network which is substantially equal to the sum of said selected stage delay times, switch means for selecting delay times for each of said time delay stages to produce a desired overall delay, optical means for directing an input optical beam into said cascaded optical time delay stages, means for modulating said optical beam with a modulating signal, and photodetector means for detecting the delayed optical output from said cascaded time delay stages and transducing it to an output electrical signal, said optical time delay stages, switch means, optical means, modulating means and photodetector means all being monolithically integrated on said semiconductor substrate. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A monolithically integrated time delay network comprising:
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a semiconductor substrate; a plurality of coupled cascaded optical waveguide delay lines, a plurality of lasers for supplying optical beams into said waveguide delay lines, modulation means for modulating said laser beams in accordance with modulating electrical signals, photodetectors for detecting optical outputs from said waveguide delay lines and transducing them to output electrical signals, and switch means for directing the light propagating through said optical waveguide delay lines, said waveguide delay lines, lasers, modulation means, photodetectors and switch means being monolithically integrated on said substrate.
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17. A monolithically integrated time delay network comprising:
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a semiconductor substrate; a plurality of coupled optical waveguide delay lines, a plurality of lasers for supplying optical beams into said waveguide delay lines, modulation means for modulating said laser beams in accordance with modulating electrical signals, photodetectors for detecting optical outputs from said waveguide delay lines and transducing them to output electrical signals, and switch means for directing the light propagating through said optical waveguide delay lines, said waveguide delay lines, lasers, modulation means, photodetectors and switch means being monolithically integrated on said substrate, wherein said waveguide delay lines comprise longer delay segments and shorter bypass branches, said delay segments having lengths appropriated for producing specified time delays, and said bypass branches having a much shorter length for producing a reference delay. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25)
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Specification