High-frequency semiconductor wafer processing method using a negative self-bias

• US 5,223,457 A
• Filed: 10/11/1991
• Issued: 06/29/1993
• Est. Priority Date: 10/03/1989
• Status: Expired due to Term

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Someskh, Sasson, Maydan, Dan, Hanawa, Hiroji, Mintz, Donald M.
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): EVERHART, BYRON S
• Application Number:
  US07/774,127
• Time in Patent Office: 627 Days
• Field of Search: 437/225, 437/228, 437/233, 427/38, 427/39
• US Class Current: 438/710
• CPC Class Codes: H01J 37/32082 Radio frequency generated discharge H01J37/32357, H01J37/32366, H01J37/32394 and H01J37/32403 take precedence
• CPC Class Codes: H01J 37/32174 Circuits specially adapted for controlling the RF discharge
• CPC Class Codes: H05H 1/46 using applied electromagnetic fields, e.g. high frequency or microwave energy H05H1/26 takes precedence
• CPC Class Codes: Y10S 148/051 Etching

Abstract

A plasma process apparatus capable of operation significantly above 13.56 MHz can produce reduced self-bias voltage of the powered electrode to enable softer processes that do not damage thin layers that are increasingly becoming common in high speed and high density integrated circuits. A nonconventional match network is used to enable elimination of reflections at these higher frequencies. Automatic control of match network components enables the rf frequency to be adjusted to ignite the plasma and then to operate at a variable frequency selected to minimize process time without significant damage to the integrated circuit.

Claims

1. A nonreactive, nonselective, inert gas ion, soft plasma etch process comprising the steps of:

(a) igniting a plasma containing inert gas ions within a reactor chamber in a plasma reactor;

(b) maintaining within said reactor chamber a gas pressure in the range 0.5-30 milliTorr; and

(c) providing rf power to a powered electrode at which a wafer is placed for processing within the reactor chamber, said power being supplied at a single power level P sufficient to maintain a plasma within the reactor chamber and at a single frequency f sufficiently greater than 13.56 MHz that plasma ions incident on the wafer have a kinetic energy that is low enough that integrated circuit features in the wafer are not damaged by these ions;

and wherein the power P being supplied from a single power supply and the frequency f are selected to produce a powered electrode negative self-bias approximately in the range 125-500 volts, for a soft etch.

2. A soft plasma etch process as in claim 1 wherein the frequency f is in the range 40-137 MHz.

3. A soft plasma etch process as in claim 1 wherein the frequency f is in the range 50-70 MHz.

4. A soft plasma etch process as in claim 1 wherein, in step (b), the power P and the frequency f are selected to produce a powered electrode negative self-bias that is approximately in the range 150-350 volts.

5. A soft plasma etch process as in claim 1 wherein rf power is supplied to said power electrode through a match network, and wherein step (a) comprises the steps of:

(a1) detuning said match network sufficiently to produce a sufficiently strong self-bias field at the powered electrode that an avalanche of electrons is produced that ignites said plasma; and

(a2) after the plasma has been ignited, tuning said match network to substantially eliminate reflected power.

6. A soft plasma etch process as in claim 1 further comprising the step of:

(a1) adjusting a match network such that, at a selected frequency f for use during etch of a wafer, there is substantially no reflection of power back to a source of said rf power.