Functional avionic core tester

• US 5,223,788 A
• Filed: 09/12/1991
• Issued: 06/29/1993
• Est. Priority Date: 09/12/1991
• Status: Expired due to Term

• Current Assignee: Grumman Aerospace Corporation (Northrop Grumman Corporation)
• Original Assignee: Grumman Aerospace Corporation (Northrop Grumman Corporation)
• Inventors: Granata, Arthur J., Andreano, Richard J., Hansen, Jeffrey W.
• Primary Examiner(s): Karlsen, Ernest F.
• Application Number:
  US07/758,001
• Time in Patent Office: 656 Days
• Field of Search: 324/158 R, 324/73.1, 371/15.1, 371/20.1, 364/481
• US Class Current: 714/25
• CPC Class Codes: G01R 31/008 on air- or spacecraft, railway rolling stock or sea-going vessels

Abstract

A testing system, in particular for weapons and avionics applications, includes a bus interface unit capable of operating as a bus controller, a remote terminal, and a monitor. The bus interface unit is compatible with military standard buses and is controlled using an enhanced Atlas test programming language. Test instruments are provided on cards using a two-part architecture in which common test instruments are arranged as part of a core tester unit while application-specific enhanced are controlled by a separate microprocessor in a functional interface unit.

Claims

1. Apparatus including a core tester and a functional interface unit for testing an electronic or electromechanical unit under test, wherein said core tester comprises:

a programmable microcomputer controller (22);

a plurality of test instruments;

a programmable bus interface unit;

first bus means including a first bus for connecting said test instruments to said bus interface unit and said programmable microcomputer controller;

second bus means including a second bus for connecting said bus interface unit to a unit under test;

means for programming causing said programmable microcomputer controller to program said bus interface unit to operate as a bus controller, as a remote terminal for receiving and transmitting bus traffic under the direction of said unit under test, and as a monitor, and means for programming the programmable microcomputer controller to direct traffic between said test instruments and said unit under test.

2. A method as claimed in claim 1, wherein said programming means comprises keep alive means for programming said bus interface unit to send a sequence of messages over said second bus to said unit under test every few milliseconds.

3. Apparatus as claimed in claim 1, wherein said second bus is a MIL-STD-1553A Aircraft Internal Time Division Command/Response Multiplex Data Bus.

4. Apparatus as claimed in claim 1, wherein said second bus is a MIL-STD-1553B Aircraft Internal Time Division Command/Response Multiplex Data Bus.

5. Apparatus as claimed in claim 1, wherein said programming means includes means for interpreting an Atlas language test program.

6. Apparatus as claimed in claim 1, wherein said bus interface unit comprises two cards to which the second bus is directly connected, whereby a separate panel interface is not required.

7. Apparatus as claimed in claim 1, wherein said programming means comprises a touch panel display.

8. Apparatus as claimed in claim 1, wherein said touch panel display is directly connected to said programmable microcomputer controller by an RS-232 link.

9. Apparatus as claimed in claim 1, wherein said programming means comprises means including cartridge bubble memory units for storing test programs.

10. Apparatus as claimed in claim 1, wherein each of two separate said bus interface units is provided on a single card.

11. Apparatus as claimed in claim 1, wherein said apparatus comprises a modular station in which said instruments, said bus interface unit, and said programmable microcomputer controller are mounted on removable cards installed in said station and wherein all connection hardware, including all buses, is built into the station.

12. Apparatus as claimed in claim 11, wherein each of said instruments is mounted on a separate card.

13. Apparatus as claimed in claim 12, wherein said first bus is an IEEE-796 bus provided in the station backplane.

14. Apparatus as claimed in claim 1, wherein said programmable microcomputer controller includes a microprocessor.

15. Apparatus as claimed in claim 14, wherein said microprocessor is an INTEL 80286 microprocessor.

16. Apparatus as claimed in claim 1, wherein said instruments comprise at least one pulse generator, a digital multimeter, a function generator, a counter/timer, and means including a power control board for programming digital pin logic levels, and wherein said programmable microcomputer controller is directly connected by said first bus to each of said instruments.

17. Apparatus as claimed in claim 16 wherein said a functional interface unit includes test equipment specific to said unit under test.

18. Apparatus as claimed in claim 17, wherein said programmable microcomputer controller comprises a first microprocessor and said functional interface unit comprises a second microprocessor.

19. Apparatus as claimed in claim 18, wherein said first and second microprocessors are connected to each other by an IEEE-488 bus.

20. Apparatus as claimed in claim 18, wherein said test equipment is connected to said second microprocessor by a IEEE-796 bus built into a test station backplane.

21. Apparatus as claimed in claim 17, wherein said core tester is connected to said unit under test by a MIL-STD-1553A bus.

22. Apparatus as claimed in claim 17, wherein said core tester is connected to said unit under test by a MIL-STD-1553B bus.

23. Apparatus as claimed in claim 1, further comprising a functional interface unit comprising test equipment specific to said unit under test.

24. Apparatus as claimed in claim 23, wherein said programmable microcomputer controller comprises a first microprocessor and said functional interface unit comprises a second microprocessor.

25. Apparatus as claimed in claim 1, wherein said core tester includes two independently programmable dual redundant interface cards.

26. A method of functionally testing an electronic or electromechanical unit under test, comprising the steps of:

(a) providing a plurality of test instruments;

(b) providing a programmable bus interface unit and a programmable microcomputer controller;

(c) providing first bus means including a first bus for connecting said test instruments to said programmable microcomputer controller;

(d) providing second bus means including a second bus for connecting said bus interface unit to a unit under test; and

(e) programming said bus interface unit to operate as a bus controller as defined by MIL-STD-1553, as a remote terminal for receiving and transmitting bus traffic under the direction of said unit under test as defined by MIL-STD-1553, and as a monitor.

27. A method as claimed in claim 26, wherein step (e) comprises the step of programming said bus interface unit using an Atlas test programming language.

28. A method as claimed in claim 26, wherein step (e) comprises the step of setting up a data list including commands and data to be transmitted by the bus interface unit in the order that they will be sent out, completing a communication with the unit under test by transmitting said data and commands to the unit under test and receiving and storing responses from the unit under test in a buffer, and reading said responses and a status bit indicative of the status of said communication.

29. A method as claimed in claim 28, wherein step (e) further comprises the step of setting up a gap time list containing a list of predetermined time intervals between transmissions of data and commands.

30. A method as claimed in claim 26, further comprising the step of programming said bus interface unit to operate in a keep alive mode which sends a sequence of messages over said second bus to said unit under test every few milliseconds to maintain the UUT in a desired operating mode.