Laser gyro dither drive

• US 5,225,889 A
• Filed: 12/11/1991
• Issued: 07/06/1993
• Est. Priority Date: 12/11/1991
• Status: Expired due to Term

• Current Assignee: Honeywell Incorporated (Honeywell International Inc.)
• Original Assignee: Honeywell Incorporated (Honeywell International Inc.)
• Inventors: Berndt, Dale F., Fritze, Keith R., Killpatrick, Joseph E.
• Primary Examiner(s): McGraw, Vincent P.
• Application Number:
  US07/805,124
• Time in Patent Office: 573 Days
• Field of Search: 356/350, 372/94
• US Class Current: 356/476
• CPC Class Codes: G01C 19/70 by mechanical means

Abstract

A direct digital dither drive for a laser gyro dither motor including a digital microcomputer which controls the dithering of a laser gyro to prevent lock in of the laser beams. The digital drive senses a dither position and schedules internal A/D conversions using an A/D conversion arbitration scheme. The period frequency and location of the minimum and maximum drive are determined using the microcontroller. Accurate dither drive is accomplished using a digital analog feedback system which compensates for real time changes in dither pickoff and dither drive components.

Claims

1. A direct digital dither drive apparatus for a laser gyro having a dithered gyro block with a dither motor and dither pickoff, the direct digital dither drive comprising:

a. a means for sensing the dither pickoff connected to the dither pickoff and having a dither pickoff output;

b. a means for amplifying the dither pickoff output having an amplified dither pickoff output;

c. a means for analog to digital conversion connected to the amplified dither pickoff output having a digital dither signal output;

d. a means for digital control connected to the digital dither signal output having a pulse width modulated signal output wherein the digital control means generates the pulse width modulated signal in proportion to the digital dither output minus a reference displacement plus a predetermined amount of random noise; and

e. a means for driving the dither motor in response to the pulse width modulated signal having a dither drive signal connected to the dither motor.

2. The direct digital dither drive apparatus of claim 1 wherein the reference displacement is dynamically adjusted.

3. The direct digital dither drive apparatus of claim 1 wherein the reference displacement is corrected by a dither stripper gain adjustment.

4. The direct digital dither drive apparatus of claim 1 wherein the reference displacement is corrected by a dither stripper gain adjustment and the reference displacement is dynamically adjusted.

5. The direct digital dither drive apparatus of claim 1 wherein the random noise has a Gaussian distribution.

6. The direct digital dither drive apparatus of claim 1 wherein the random noise has a Normal distribution.

7. The direct digital dither drive apparatus of claim 1 further including a power supply which provides a power supply signal, the means for driving the dither motor comprising:

a. low pass filtering means having an output for providing a filtered signal and an input connected to the pulse width modulated drive signal;

b. a means for amplifying the filtered signal from the low pass filtering means having an amplified signal output wherein the amplifying means is coupled at an input to the output of the low pass filtering means; and

c. the dither drive signal responds to the amplified signal output, wherein the driving means includes an active pull-up means including means for providing a dead band operating characteristic.

8. The direct digital dither drive apparatus of claim 7 wherein the active pull-up means substantially eliminates current spikes on the power supply signal so as to provide low power consumption.

9. The direct digital dither drive apparatus of claim 7 wherein the active pull-up means comprises:

a. a first transistor means having a base, collector and emitter;

b. a second transistor means having a base, collector and emitter wherein the collectors of the first and second transistor means are connected to a voltage source and the emitter of the first transistor means is connected to the base of the second transistor means in a Darlington configuration; and

c. diode means connected at a first terminal to the emitter of the second transistor means and at a second terminal to the base of the first transistor means.

10. The direct digital dither drive apparatus of claim 1 wherein the means for driving the dither motor provides an output in the range of +150 to -150 volts in response to the pulse width modulation input ranging from 0% to 100% duty cycle.

11. The direct digital dither drive apparatus of claim 1 further including an analog to digital converter scheduling method wherein the laser gyro further includes a dither stripper sharing the means for analog to digital conversion, the analog to digital converter scheduling method comprising the steps of:

a. defining a dither stripping begin time and a dither stripping duration;

b. computing an expected strip time as being the dither stripping begin time plus the dither stripper duration;

c. building a window of predetermined time around the strip time; and

d. calculating whether or not the predetermined analog to digital conversion for the digital dither signal will occur within the window and if it does setting a flag to indicate that the stripper analog to digital conversion will be shared with the drive analog to digital conversion.

12. The direct digital dither drive apparatus of claim 11 wherein the dither stripping begin time includes an analog to digital conversion time.

13. The direct digital dither drive apparatus of claim 1 wherein the analog to digital conversions are phase compensated for time delays in analog signal propagation and digital signal processing.

14. The direct digital dither drive apparatus of claim 1 wherein the dither crosses a point of zero magnitude periodically every dither period and the analog to digital conversion of the digital drive signal occurs at one quarter of the way through the dither period called the 90°

dither period sample time and three quarters of the way through the dither period called the 270°

dither period sample time.

15. The direct digital dither drive apparatus of claim 14 wherein the method of determining the 90°

and 270°

dither period sample times comprises the steps of;

a. determining the time of the zero crossing of the dither and defining an interrupt time;

b. accessing a last interrupt time stored from the previous dither period;

c. determining a change in time by subtracting the interrupt time from the last interrupt time;

d. dividing the change in time by four to determine the quarter dither period;

e. calculating the 90°

dither period sample time to equal the quarter dither period minus a predetermined phase lead time;

f. calculating the half dither period to be the twice the quarter dither period; and

g. calculating the 270°

dither period sample time to equal the sum of the half dither period plus the 90°

dither period sample time.

16. The direct digital dither drive apparatus of claim 15 wherein the predetermined phase lead time is equal to the change in time divided by a predetermined compensation constant.

17. The direct digital dither drive apparatus of claim 1 wherein the means for digital control is a microcontroller.

18. The direct digital dither drive apparatus of claim 17 wherein the microcontroller comprises monolithic integrated circuit.

19. The direct digital dither drive apparatus of claim 1 wherein the means for sensing the dither pickoff comprises:

a. a first capacitor in parallel with the dither pickoff having a first terminal and second terminal;

b. a first resistor in parallel with the dither pickoff and first capacitor connected between the first terminal and second terminal;

c. a second capacitor connected to the first terminal and the input of a first amplifier to ac couple the dither pickoff wherein the second capacitor has a filtered dither output;

d. a first amplifier means for amplifying the filtered dither output having an analog dither pickoff output, a first input and second input wherein the first input is connected to the filtered dither output and the second input is connected to the analog dither pickoff output through a second resistor and fourth capacitor connected in parallel and wherein the second input is connected to ground through a third resistor; and

e. a second amplifier means for amplifying the analog dither pickoff output having a dither zero crossing detector output, a first input and second a second input wherein the first input is connected to the analog dither pickoff output and the second input is connected to the dither zero crossing detector output thought a fifth resistor and wherein the second input is also connected to ground through a sixth resistor.

20. The direct digital dither drive apparatus of claim 19 wherein a dither drive software interrupt is generated by the transition of the zero crossing detector output.

21. The direct digital dither drive apparatus of claim 20 wherein the frequency of the dither motor is calculated by the number of transitions of the zero crossing detector divided by the time duration of the transitions of the zero crossing detector.

22. The direct digital dither drive apparatus of claim 1 wherein the means for control provides a first pulse width modulated dither drive signal and a second pulse width modulated dither drive signal, and wherein the means for driving the dither motor comprises:

a. a first transistor means with a first gate, first source and first drain wherein the first gate is connected to the first pulse width modulated dither drive signal and the first drain is connected to ground;

b. a second transistor means with a second gate, second source and second drain wherein the second gate is connected to the second pulse width modulated dither drive signal and the second drain is connected to ground;

c. a first induction means having a first coil with a first and second terminal and a second coil with a third and fourth terminal and a center terminal wherein the first terminal is connected to the dither drive signal, the second terminal is connected to ground, the center terminal is connected to a voltage supply means, the third terminal is connected to the first source and the fourth terminal is connected to the second source;

d. a first diode connected between the third terminal and center terminal; and

e. a second diode connected between the fourth terminal and center terminal.

23. The direct digital dither drive apparatus of claim 1 wherein an A/D conversion has occurred and is arbitrated between a dither drive method, a dither stripper method and a background method, wherein the A/D conversion may also be shared by the dither drive method and dither stripper method, and wherein the arbitration method comprises the steps of:

a. determining whether the A/D conversion was called by the dither drive method, the dither stripper method, the shared dither drive method and the dither stripper method or the background method;

b. storing an A/D value in the dither stripper register if the A/D conversion was called by the dither stripper method or the shared dither stripper method and dither drive method;

c. setting an A/D conversion complete flag for the dither stripper method;

d. driving the dither motor;

e. storing an A/D value in a background register if the A/D conversion was called by the background method; and

f. setting the A/D conversion complete flag for the background method.

24. The direct digital dither drive apparatus of claim 1 further including an A/D priority register, and a timing method to schedule either a dither only analog to digital conversion, shared analog to digital conversion or perform a background analog to digital conversion with a dither only flag, dither and stripper flag, background flag, where an active flag indicates the respective conversion should be done, the scheduling method comprising the steps of:

a. setting a dither only flag in the A/D priority register if the dither only flag is active;

b. setting a dither and stripper flag in the A/D priority register if the dither and striper flag is active and the dither only flag is inactive; and

c. performing the background analog to digital conversion and storing the result of the background analog to digital conversion in a background A/D conversion register if the stripper conversion will happen within a predetermined window, the dither and stripper flag is inactive and the dither only flag is inactive.

25. The direct digital dither drive apparatus of claim 1 wherein the method of determining the system sample clock for a laser gyro dither stripping method comprises the steps of:

a. initializing a counter;

b. capturing a sample clock edge of an external sample clock and generating an interrupt;

c. executing after the interrupt occurs the following steps;

d. storing a count value for the current time;

e. reading an old time from a memory previously stored;

f. computing a delta time to be the old time minus the new time;

g. setting up an A/D conversion in a high speed output logic means;

h. setting the old time to equal the new time and then returning to step (b) to wait for a sample edge.

26. A direct digital dither drive method for a laser gyro having a dithered gyro block with a dither motor and dither pickoff, the direct digital dither drive method comprising the steps of:

a. sensing the actual displacement of the gyro block;

b. reading a reference displacement of the gyro block previously stored in a memory;

c. compacting the difference between the reference displacement and the actual displacement;

d. forming a digital drive signal by adding random noise of a predetermined distribution to the difference;

e. converting the digital drive signal into a pulse width modulation signal; and

f. direct driving the dither motor with the pulse width modulation signal.

27. The direct digital dither drive method of claim 26 wherein the error is gain adjusted by multiplying the error by a gain factor.

28. The direct digital dither drive method of claim 26 wherein the pulse width modulation signal is limited to prevent rollover.

29. The direct digital dither drive method of claim 26 wherein the reference displacement is dynamically adjusted.

30. The direct digital dither drive method of claim 26 wherein the reference displacement is corrected by a dither stripper gain adjustment.

31. The direct digital dither drive method of claim 26 wherein the reference displacement is corrected by a dither stripper gain adjustment and the reference displacement is dynamically adjusted.

32. A direct dither drive apparatus for a laser gyro having a dithered gyro block with a dither motor and dither pickoff, the direct dither drive comprising:

a. a means for amplification connected to the dither pickoff having an analog dither signal output;

b. means for converting the analog dither signal to a digital dither signal;

c. a means for converting the digital dither signal into a digital count signal by multiplying the digital dither signal by a predetermined scale factor;

d. a means for subtracting a reference displacement count from the digital count signal to generate a differential displacement signal;

e. a means for injecting random noise into the differential displacement signal to generate a digital drive signal;

f. a means for converting the digital drive signal into a pulse width modulated signal; and

g. a means for driving the dither motor in response to the pulse width modulated signal.

33. The direct dither drive apparatus of claim 32 wherein the pulse width modulated signal is limited to prevent rollover.

34. The direct dither drive apparatus of claim 32 wherein the differential displacement signal is gain adjusted to the magnitude of the random noise.

35. The direct dither drive apparatus of claim 32 wherein the reference displacement is dynamically adjusted.

36. The direct dither drive apparatus of claim 32 wherein the reference displacement is corrected by a dither stripper gain adjustment.

37. The direct dither drive apparatus of claim 32 wherein the reference displacement is corrected by a dither stripper gain adjustment and the reference displacement is dynamically adjusted.

38. The direct dither drive of claim 32 wherein the random noise has a Gaussian distribution.

39. The direct dither drive of claim 32 wherein the random noise has a Normal distribution.

40. The direct dither drive apparatus of claim 32 further including a power supply which provides a power supply signal, the means for driving the dither motor comprising:

a. low pass filtering means having an output for providing a filtered signal and an input connected to the pulse width modulated drive signal;

b. a means for amplifying the filtered signal from the low pass filtering means having an amplified signal output wherein the amplifying means is coupled at an input to the output of the low pass filtering means; and

c. the dither drive signal responds to the amplified signal output, wherein the driving means includes an active pull-up means including means for providing a dead band operating characteristic.

41. The direct dither drive apparatus of claim 40 wherein the active pull-up means substantially eliminates current spikes on the power supply signal so as to provide low power consumption.

42. The direct dither drive apparatus of claim 40 wherein the active pull-up means comprises:

a. a first transistor means having a base, collector and emitter;

b. a second transistor means having a base, collector and emitter wherein the collectors of the first and second transistor means are connected to a voltage source and the emitter of the first transistor means is connected to the base of the second transistor means in a Darlington configuration; and

c. diode means connected at a first terminal to the emitter of the second transistor means and at a second terminal to the base of the first transistor means.

43. The direct dither drive apparatus of claim 32 wherein the means for driving the dither motor provides an output in the range of +150 to -150 volts in response to the pulse width modulation input ranging from 0% to 100% duty cycle.

44. The direct dither drive of claim 32 further including an analog to digital converter scheduling method wherein the laser gyro further includes a dither stripper sharing the means for analog to digital conversion, the analog to digital converter scheduling method comprising the steps of:

a. defining a dither stripping begin time and a dither stripping duration;

b. computing an expected strip time as being the dither stripping begin time plus the dither stripper duration;

c. building a window of predetermined time around the strip time; and

d. calculating whether or not the predetermined analog to digital conversion for the digital dither signal will occur within the window and if it does setting a flag to indicate that the stripper analog to digital conversion will be shared with the drive analog to digital conversion.

45. The direct dither drive of claim 44 wherein the dither stripping begin time includes an analog to digital conversion time.

46. The direct dither drive apparatus of claim 32 wherein the analog to digital conversions are phase compensated for time delays in analog signal propagation and digital signal processing.

47. The direct dither drive apparatus of claim 32 wherein the dither crosses a point of zero magnitude periodically every dither period and the analog to digital conversion of the digital drive signal occurs at one quarter of the way through the dither period called the 90°

dither period sample time and three quarters of the way through the dither period called the 270°

dither period sample time.

48. The direct dither drive of claim 47 wherein the method of determining the 90°

and 270°

dither period sample times comprises the steps of;

a. determining the time of the zero crossing of the dither and defining an interrupt time;

b. accessing a last interrupt time stored from the previous dither period;

c. determining a change in time by subtracting the interrupt time from the last interrupt time;

d. dividing the change in time by four to determine the quarter dither period;

e. calculating the 90°

dither period sample time to equal the quarter dither period minus a predetermined phase lead time;

f. calculating the half dither period to be the twice the quarter dither period; and

g. calculating the 270°

dither period sample time to equal the sum of the half dither period plus the 90°

dither period sample time.

49. The direct dither drive of claim 48 wherein the predetermined phase lead time is equal to the change in time divided by a predetermined compensation constant.

50. The direct dither drive apparatus of claim 32 wherein the means for digital control is a microcontroller.

51. The direct dither drive apparatus of claim 32 wherein the means for amplification connected to the dither pickoff further comprises:

a. a first capacitor in parallel with the dither pickoff having a first terminal and second terminal;

b. a first resistor in parallel with the dither pickoff and first capacitor connected between the first terminal and second terminal;

c. a second capacitor connected to the first terminal and the input of a first amplifier to ac couple the dither pickoff wherein the second capacitor has a filtered dither output;

d. a first amplifier means for amplifying the filtered dither output having an analog dither pickoff output, a first input and second input wherein the first input is connected to the filtered dither output and the second input is connected to the analog dither pickoff output through a second resistor and fourth capacitor connected in parallel and wherein the second input is connected to ground through a third resistor; and

e. a second amplifier means for amplifying the analog dither pickoff output having a dither zero crossing detector output, a first input and second a second input wherein the first input is connected to the analog dither pickoff output and the second input is connected to the dither zero crossing detector output thought a fifth resistor and wherein the second input is also connected to ground through a sixth resistor.

52. The direct dither drive of claim 51 wherein a dither drive software interrupt is generated by the transition of the zero crossing detector output.

53. The direct dither drive of claim 52 wherein the frequency of the dither motor is calculated by the number of transitions of the zero crossing detector divided by the time duration of the transitions of the zero crossing detector.

54. The direct dither drive apparatus of claim 32 wherein the means for driving the dither motor further includes a high speed output logic means to drive a first dither leg with a first pulse width modulated signal and a second dither leg with a second pulse width modulated signal.

55. The direct dither drive apparatus of claim 32 wherein the means for converting the digital drive signal provides a first pulse width modulated dither drive signal and a second pulse width modulated dither drive signal, and wherein the means for driving the dither motor comprises:

a. a first transistor means with a first gate, first source and first drain wherein the first gate is connected to the first pulse width modulated dither drive signal and the first drain is connected to ground;

b. a second transistor means with a second gate, second source and second drain wherein the second gate is connected to the second pulse width modulated dither drive signal and the second drain is connected to ground;

c. a first induction means having a first coil with a first and second terminal and a second coil with a third and fourth terminal and a center terminal wherein the first terminal is connected to the dither drive signal, the second terminal is connected to ground, the center terminal is connected to a voltage supply means, the third terminal is connected to the first source and the fourth terminal is connected to the second source;

d. a first diode connected between the third terminal and center terminal; and

e. a second diode connected between the fourth terminal and center terminal.

56. The direct dither drive of claim 32 wherein an A/D conversion has occurred and is arbitrated between a dither drive method, a dither stripper method and a background method, wherein the A/D conversion may also be shared by the dither drive method and dither stripper method, and wherein the arbitration method comprises the steps of:

a. determining whether the A/D conversion was called by the dither drive method, the dither stripper method, the shared dither drive method and the dither stripper method or the background method;

b. storing an A/D value in the dither stripper register if the A/D conversion was called by the dither stripper method or the shared dither stripper method and dither drive method;

c. setting an A/D conversion complete flag for the dither stripper method;

d. driving the dither motor;

e. storing an A/D value in a background register if the A/D conversion was called by the background method; and

f. setting the A/D conversion complete flag for the background method.

57. The direct dither drive of claim 32 further including an A/D priority register, and a timing method to schedule either a dither only analog to digital conversion, shared analog to digital conversion or perform a background analog to digital conversion with a dither only flag, dither and stripper flag, background flag, where an active flag indicates the respective conversion should be done, the scheduling method comprising the steps of:

a. setting a dither only flag in the A/D priority register if the dither only flag is active;

b. setting a dither and stripper flag in the A/D priority register if the dither and striper flag is active and the dither only flag is inactive; and

c. performing the background analog to digital conversion and storing the result of the background analog to digital conversion in a background A/D conversion register if the stripper conversion will happen within a predetermined window, the dither and stripper flag is inactive and the dither only flag is inactive.

58. The direct dither drive of claim 32 wherein the method of determining the system sample clock for a laser gyro dither drive method comprises the steps of:

a. initializing a counter;

b. capturing a sample clock edge of an external sample clock and generating an interrupt;

c. executing after the interrupt occurs the following steps;

d. storing a count value for the current time;

e. reading an old time from a memory previously stored;

f. computing a delta time to be the old time minus the new time;

g. setting up an A/D conversion in a high speed output logic device;

h. setting the old time to equal the new time and then returning to step (b) to wait for a sample edge.

59. A direct dither drive apparatus for a laser gyro having a dithered gyro block with a dither motor and dither pickoff, the direct dither drive comprising:

a. a means for amplification connected to the dither pickoff having an analog dither signal output;

b. a means for converting the analog dither signal to a digital dither signal;

c. a means for converting a count reference displacement signal into a digital volt reference displacement signal by multiplying the digital dither signal by a predetermined scale factor;

d. a means for subtracting a digital volt reference displacement signal from the digital dither signal to generate a differential displacement signal;

e. a means for injecting random noise into the differential displacement signal to generate a digital drive signal;

f. a means for converting the digital drive signal into a pulse width modulated signal; and

g. a means for driving the dither motor in response to the pulse width modulated signal.

60. The direct dither drive apparatus of claim 59 wherein the means for driving the dither motor further includes a high speed output logic means to drive a first dither leg with a first pulse width modulated signal and a second dither leg with a second pulse width modulated signal.

61. The direct dither drive apparatus of claim 59 wherein the means for converting the digital drive signal provides a first pulse width modulated dither drive signal and a second pulse width modulated dither drive signal, and wherein the means for driving the dither motor comprises:

a. a first transistor means with a first gate, first source and first drain wherein the first gate is connected to the first pulse width modulated dither drive signal and the first drain is connected to ground;

b. a second transistor means with a second gate, second source and second drain wherein the second gate is connected to the second pulse width modulated dither drive signal and the second drain is connected to ground;

c. a first induction means having a first coil with a first and second terminal and a second coil with a third and fourth terminal and a center terminal wherein the first terminal is connected to the dither drive signal, the second terminal is connected to ground, the center terminal is connected to a voltage supply means, the third terminal is connected to the first source and the fourth terminal is connected to the second source;

d. a first diode connected between the third terminal and center terminal; and

e. a second diode connected between the fourth terminal and center terminal.

62. A ring laser dither pickoff sensor comprising:

a. a first capacitor in parallel with the dither pickoff having a first terminal and second terminal;

b. a first resistor in parallel with the dither pickoff and first capacitor connected between the first terminal and second terminal;

c. a second capacitor connected to the first terminal and the input of a first amplifier to ac couple the dither pickoff wherein the second capacitor has a filtered dither output;

d. a first amplifier means for amplifying the filtered dither output having an analog dither pickoff output, a first input and second input wherein the first input is connected to the filtered dither output and the second input is connected to the analog dither pickoff output through a second resistor and fourth capacitor connected in parallel and wherein the second input is connected to ground through a third resistor; and

e. a second amplifier means for amplifying the analog dither pickoff output having a dither zero crossing detector output, a first input and second a second input wherein the first input is connected to the analog dither pickoff output and the second input is connected to the dither zero crossing detector output thought a fifth resistor and wherein the second input is also connected to ground through a sixth resistor.

63. A direct digital dither drive apparatus for a laser gyro having a dithered gyro block with a dither motor having a dither zero crossing detector, dither pickoff, read out counter, and a system sample strobe, the direct digital dither drive comprising:

a. an edge triggered register means for latching the read out counter value on the system sample strobe having a latched read out counter output;

b. a first analog to digital conversion means connected to the dither pickoff for generating a stripper sample enabled by the system sample strobe;

c. a second analog to digital conversion means connected to the dither pickoff for generating a dither drive sample enabled by the dither zero crossing detector; and

d. a direct digital control means for controlling the dither motor connected to the stripper sample, and drive sample wherein the direct digital control means provides a direct digital drive signal.

64. The direct digital dither drive apparatus of claim 63 also comprising a third analog to digital conversion means connected to the a plurality of multiplexed background signals for generating a background sample enabled by the direct digital dither control means.