Programmable logic system for filtering commands to a microprocessor
First Claim
1. A method for filtering input commands to a controller accessed by a microprocessor, said controller producing system control signals in response to input commands from said microprocessor, comprising the steps of:
- (a) monitoring signal lines connected to output terminals of said microprocessor, said signal lines communicating input commands from the microprocessor;
(b) inhibiting said controller from generating a system control signal corresponding to a selected input command, said controller operable to generate said system control signal corresponding to said selected input command, after a controller delay period, if not so inhibited;
(c) processing said selected input command using a logic device; and
(d) producing an output signal from said logic device corresponding to said selected input command, as said system control signal, after a shorter delay from the time said monitoring step detects said selected input command than said controller delay period.
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Accused Products
Abstract
A system utilizes one or more programmable logic arrays or gate arrays for regulating the commands available to a microprocessor, and intercepting certain of those commands according to predetermined citeria. The system selects and processes designated commands relating to the FORCE-A20 signal and CPU-RESET signal for a keyboard controller functionally attached to an INTEL 80286 or 80386 microprocessor. The system includes one or more programmable logic arrays or gate arrays for allowing all input commands to pass directly through to the keyboard controller except the command sequence relating to the FORCE-A20 signal or the CPU-RESET signal.
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Citations
21 Claims
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1. A method for filtering input commands to a controller accessed by a microprocessor, said controller producing system control signals in response to input commands from said microprocessor, comprising the steps of:
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(a) monitoring signal lines connected to output terminals of said microprocessor, said signal lines communicating input commands from the microprocessor; (b) inhibiting said controller from generating a system control signal corresponding to a selected input command, said controller operable to generate said system control signal corresponding to said selected input command, after a controller delay period, if not so inhibited; (c) processing said selected input command using a logic device; and (d) producing an output signal from said logic device corresponding to said selected input command, as said system control signal, after a shorter delay from the time said monitoring step detects said selected input command than said controller delay period. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A system for filtering input commands to a control device in a microprocessor-based computer system, said system comprising:
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means for monitoring input lines to said control device in such a manner that said control device is inhibited from responding to a set of selected input commands, said control device operable to produce a control signal, after a control device delay period, responsive to receiving an input command in said set of selected input commands if not so inhibited; and means for outputting said control signal to a control line in said system, responsive to receipt by said monitoring means of an input command in said set of selected input commands and after a delay from such receipt that is shorter than said control device delay period. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. Apparatus for selecting and processing commands sent from a microprocessor to a controller, said microprocessor being of the INTEL 80286 or INTEL 80386 microprocessor type, said input commands including a first input command functioning to initiate an override of address line A20 as useful in switching said microprocessor between real and protected modes, said apparatus comprising:
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a programmable logic array for monitoring input commands to said controller; wherein said programmable logic array is connected to said microprocessor and said controller in such a manner that said first input command, responsive to which said controller outputs a FORCE-A20 signal, is not applied to said controller; and wherein said programmable logic array outputs a FORCE-A20 signal responsive to receiving said first input command. - View Dependent Claims (18, 19, 20, 21)
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Specification