Bus interface circuit for a multimedia system

• US 5,230,041 A
• Filed: 12/11/1990
• Issued: 07/20/1993
• Est. Priority Date: 12/11/1990
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Wilkie, Bruce J., Dinwiddie, John M. Jr., Suarez, Gustavo A., Freeman, Bobby J.
• Primary Examiner(s): Shaw, Dale M.
• Assistant Examiner(s): Tung, Kee M.
• Application Number:
  US07/626,791
• Time in Patent Office: 952 Days
• Field of Search: 395/157, 395/154, 395/158, 395/162, 395/325, 340/721, 340/724, 340/734, 340/747
• US Class Current: 345/520
• CPC Class Codes: G06F 3/14 Digital output to display device ; Cooperation and interconnection of the display device with other functional units
• CPC Class Codes: G09G 1/167 Details of the interface to the display terminal specific for a CRT details suitable for both CRT and flat panel G09G5/006, specific for a flat panel G09G3/2096
• CPC Class Codes: G09G 5/00 Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators image data processing or generation, in general G06T

Abstract

An information handling apparatus for transferring and composing image signals for display including a bus interface circuit adapted to allow selective access to a bus of an independent image signal generated by an independent image source. The selective access enables composition of the independent image signal in response to control information; the composition enables real time display of a composed image signal.

Claims

1. An information handling apparatus for transferring and composing image signals for display comprising:

a bus interface circuit adapted to allow selective access to a bus of an independent analog image signal continuously generated by an independent image source,

said selective access enabling composition of said independent image signal in response to control information,

said composition enabling real time display of a composed image signal representing an image to be displayed.

2. The apparatus of claim 1 wherein

said bus interface circuit includes a switch circuit,

said switch circuit being configured to selectively switch said independent image signal to allow said selective access to the bus in response to switch control information.

3. The apparatus of claim 2 wherein

said bus interface circuit includes a control circuit,

said control circuit being configured to provide said switch control information to said switch based upon said control information.

4. The apparatus of claim 3 wherein

said control circuit includes a window control circuit,

said window control circuit being configured to generate said switch control information based upon said control information.

5. The apparatus of claim 4 wherein

said window control circuit includes a comparison circuit,

said comparison circuit being configured to provide a window enable signal based upon said control information,

said window enable signal indicating when access to said bus is allowed.

6. The apparatus of claim 5 wherein

said control information includes synchronization information, and

said window control circuit includes a timing circuit,

said timing circuit being configured to receive said synchronization information and to provide count information to said comparison circuit.

7. The apparatus of claim 6 wherein

said control information includes window start and stop information,

said comparison circuit is configured to receive said window start and window stop information, and

said comparison circuit is configured to compare said count information to said window start and window stop information and to generate said window enable signal based upon said comparison.

8. The apparatus of claim 7 wherein

said comparison circuit includes a latch circuit,

said latch circuit being configured to set said window enable signal when said window start information corresponds to said count information and to reset said window enable signal when said window stop information corresponds to said count information.

9. The apparatus of claim 8 wherein

said control information includes a window hidden signal, and

said latch circuit is configured to disable generation of said window enable signal upon receiving an active window hidden signal.

10. The apparatus of claim 2 wherein

said switch circuit includes first and second channel switch circuits,

said first channel switch circuit being configured to selectively switch said independent image signal onto a first channel of the bus,

said second channel switch circuit being configured to selectively switch said independent image signal onto a second channel of the bus.

11. The apparatus of claim 5 wherein

said control information includes window priority information,

said window control circuit includes a window priority circuit,

said window priority circuit being configured to receive said window enable signal and said window priority information and to control said switch circuit based upon said window enable signal and said window priority signal.

12. An information handling apparatus for transferring and composing image signals for display comprising:

a bus interface circuit adapted to allow selective access to a bus of an independent image signal generated by an independent image source,

said selective access enabling composition of said independent image signal in response to control information,

said composition enabling real time display of a composed image signal,

said bus interface circuit including a switch circuit configured to selectively switch said independent image signal to allow said selective access to the bus in response to switch control information and a control circuit configured to provide said switch control information to said switch based upon said control information,

said control circuit including a window control circuit configured to generate said switch control information based upon said control information,

said window control circuit including a comparison circuit configured to provide a window enable signal based upon said control information, said window enable signal indicating when access to said bus is allowed,

said comparison circuit being configured to receive window start and window stop information, and to compare said count information to said window start and window stop information and to generate said window enable signal based upon said comparison,

said window control circuit also including a timing circuit configured to receive synchronization information and to provide count information to said comparison circuit,

wherein said window start information includes horizontal window start information, said window stop information includes horizontal window stop information, said count information includes horizontal count information, and said comparison circuit compares said horizontal window start information and said horizontal window stop information with said horizontal count information.

13. The apparatus of claim 12 wherein

said comparison circuit includes a latch circuit,

said latch circuit being configured to set said window enable signal when said horizontal window start information corresponds to said horizontal count information and to reset said window enable signal when said horizontal window stop information corresponds to said horizontal count information.

14. The apparatus of claim 13 wherein

said window start information includes vertical window start information,

said window stop information includes vertical window stop information,

said count information includes vertical count information, and

said comparison circuit compares said vertical window start information and said vertical window stop information with said vertical count information.

15. The apparatus of claim 14 wherein

said latch circuit is configured to enable generation of said window enable signal when said vertical window start information corresponds to said vertical count information and to disable generation of said window enable signal when said vertical window stop information corresponds to said vertical count information.

16. The apparatus of claim 15 wherein

said control information includes a window hidden signal, and

said latch circuit is configured to disable generation of said window signal upon receiving an active window hidden signal.

17. An apparatus for granting a media source access to a bus on a point by point basis, a point being related to a coordinate of a display device, the combination comprising

a bus interface circuit adapted to allow selective access to the bus of an independent analog image signal continuously generated by the media source,

said selective access enabling composition of said independent image signal in response to control information,

said composition enabling real time display by the display device of a composed image signal representing an image to be displayed.