Microcomputer

• US 5,230,066 A
• Filed: 03/30/1992
• Issued: 07/20/1993
• Est. Priority Date: 09/19/1986
• Status: Expired due to Fees

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Morimi, Yoichi
• Primary Examiner(s): Nguyen, Phu K.
• Application Number:
  US07/860,108
• Time in Patent Office: 477 Days
• Field of Search: 395/164, 395/165, 395/166, 395/145, 395/162, 395/144, 340/797, 340/750, 340/798, 340/799, 400/83, 400/63
• US Class Current: 345/501
• CPC Class Codes: G09G 5/42 characterised by the display of patterns using a display memory without fixed position correspondence between the display memory contents and the display position on the screen

Abstract

A display controller includes a display memory having capacity for storing first and second memory lines of a display. A controller interrupts a CPU after each line is displayed so that the CPU writes a subsequent line to be displayed to the memory line whose data has just been displayed. The interrupt includes pointer information identifying which line has just been displayed and which line must be written to display memory by the CPU.

Claims

1. An improved microcomputer, including a display memory having only two lines, for generating a multi-line character display comprising:

a display memory having only first and second line storage areas for providing characters in the form of character codes to be displayed stored in said first line area when a first address is received to select said second line storage area and for providing characters int he form of said character codes to be displayed stored in said second line area when a second address is received to select said first line storage area so that one of said line storage areas is a selected line storage area and the other one is an unselected line storage area at a given time;

a character pattern generator, coupled to receive the characters provided by said display memory, for converting said character codes into bit patterns for display output;

a controller comprising an address counter which is incremented by one every completion of display of one character of one line on a display device and a coincidence circuit for comparing an output value of this address counter with a predetermined value and for generating an interrupt signal when the output value is equal to the predetermined value;

a toggle circuit, having an input coupled to receive the interrupt signal from said controller and an output for transmitting said first and second address signals to said display memory, for alternately selecting said first and second line storage areas in response to said interrupt signal provided by said controller; and

a CPU, that receives said interrupt signal and pointer, for writing, in response to said interrupt signal provided by said controller, the next line of characters of said multi-line display to be displayed to the unselected line storage area of said display memory that is not currently providing characters being displayed.

2. An improved microcomputer, including a display memory having only two lines, for generating a multi-line character display comprising:

a display memory having only first and second line storage areas for providing characters in the form of character codes to be displayed stored in said first line area when a first address is received to select said second line storage area and for providing characters in the form of said character codes to be displayed stored in said second line area when a second address is received to select said first line storage area so that one of said line storage areas is a selected line storage area and the other one is an unselected line storage area at a given time;

a character pattern generator, coupled to receive the characters provided by said display memory, for converting said character codes into bit patterns for display output;

a controller comprising an address counter which is incremented by one in direct response to every completion of display of one character of one line on a display device and a coincidence circuit for comparing an output value of this address counter with a predetermined value and for generating an interrupt signal when these values correspond;

a toggle circuit, having an input coupled to receive the interrupt signal from said controller and an output for transmitting said first and second address signals to said display memory, for alternately selecting said first and second line storage areas in response to said interrupt signal provided by said controller; and

a CPU, that receives, at the same time, said interrupt signal and pointer, for writing, in response to said interrupt signal provided by said controller, the next line of characters of said multi-line display to be displayed to the unselected line storage area of said display memory that is not currently providing characters being displayed.