System for measuring the distance between two stations mobile with regard to one another

• US 5,233,353 A
• Filed: 09/15/1992
• Issued: 08/03/1993
• Est. Priority Date: 09/18/1991
• Status: Expired due to Fees

• Current Assignee: Orange S.A.
• Original Assignee: Orange S.A.
• Inventors: Meyer, Sylvain, Guena, Jean, Leost, Jean-Claude
• Primary Examiner(s): Hellner, Mark
• Application Number:
  US07/947,678
• Time in Patent Office: 322 Days
• Field of Search: 342/125, 342/51, 342/42
• US Class Current: 342/125
• CPC Class Codes: G01S 13/84 for distance determination by phase measurement

Abstract

An emitted wave is transmitted from a central station to a passive end. A phase modulation circuit in the passive end modulates a signal resulting from the emitted wave for retransmitting it in the form of a two-phase-state modulated signal at the rhythm of a clock signal. In the central station, the modulated signal is demodulated into two quadrature signals. On the basis of the product of the two quadrature signals and the sign of the difference between the moduli of the rectified quadrature signals, the count of an up-down counter in a digital processing circuit is incremented or decremented in order for said count to be representative of the distance separating the passive end and the central station.

Claims

1. A system for measuring a distance between first and second stations mobile with regard to one another,

said second station comprising means for modulating a carrier signal emitted from said first station by a digital signal into a two-phase-state modulated signal which is transmitted to said first station, and

said first station comprising:

means for demodulating and filtering said two-phase-state modulated signal into two phase-quadrature demodulated and filtered signals,

means for deriving a first logic signal having logic levels dependent on the sign of a product of said two phase-quadrature demodulated and filtered signals

means for deriving a second logic signal having logic levels dependent on the sign of the difference of the moduli of said two phase-quadrature demodulated and filtered signals,

first means for generating first and second pulses respectively in response to first and second transitions in one of the first and second logic signals respectively when the other one of the first and second logic signals is at first and second logic levels, and in response to said first and second transitions in said one of the first and second logic signals respectively when said other one of the first and second logic signals is at said second and first logic levels, and

up-down counting means for counting up said first pulses and counting down said second pulses thereby deriving a pulse count representative of said distance.

2. The system as claimed in claim 1, wherein said first pulses generating means comprises

a first couple of first and second means for respectively detecting said first and second transitions in said one of the first and second logic signals thereby deriving transition detection pulses when said other one of the first and second logic signals is at said first logic level,

a second couple of first and second means for respectively detecting said first and second transitions in said one of the first and second logic signals thereby deriving transition detection pulses when said other one of the first and second logic signals is at said second logic level,

first means for combining said detection pulses derived by said first detecting means in said first couple and by said second detecting means in said second couple into said first pulses, and

second means for combining said detection pulses derived by said second detecting means in said first couple and by said first detecting means in said second couple into said second pulses.

3. The system as claimed in claim 2, wherein each of said first and second detecting means comprises a monostable flip-flop, said monostable flip-flops in said first and second detecting means in each of said couples respectively receiving directly and via an inverter means said one of the first and second logic signals, and said monostable flip-flops in said first and second couples being respectively reset in response to said second and first logic levels of the other one of the first and second logic signals.

4. The system as claimed in claim 1, wherein said digital signal modulating said carrier signal in said second station is a clock signal.

5. A system for measuring a distance between first and second stations mobile with regard to one another,

said second station comprising means for modulating a carrier signal emitted from said first station by a digital signal into a two-phase-state modulated signal which is transmitted to said first station, and

said first station comprising:

means for demodulating and filtering said two-phase-state modulated signal into two phase-quadrature demodulated and filtered signals,

means for deriving a first logic signal having logic levels dependent on the sign of a product of said two phase-quadrature demodulated and filtered signals,

means for deriving a second logic signal having logic levels dependent on the sign of the difference of the moduli of said two phase-quadrature demodulated and filtered signals,

first means for generating first and second pulses respectively

in response to first and second transitions in one of the first and second logic signals respectively when the other one of the first and second logic signals is at first and second logic levels, and

in response to said first and second transitions in said one of the first and second logic signals respectively when said other one of the first and second logic signals is at said second and first logic levels,

second means for generating first and second pulses respectively

in response to first and second transitions in said other one of the first and second logic signals respectively when said one of the first and second logic signals is at first and second logic levels, and

in response to said first and second transitions in said other one of the first and second logic signals respectively when said one of the first and second logic signals is at said second and first logic levels, and

up-down counting means for counting up said first pulses generated by said first and second generating means and counting down said second pulses generated by said first and second generating means thereby deriving a pulse count representative of said distance.

6. The system as claimed in claim 5, wherein said first and second pulse generating means each comprise

a first couple of first and second means for respectively detecting said first and second transitions in said one, respectively said other one, of the first and second logic signals thereby deriving transition detection pulses when said other one, respectively said one, of the first and second logic signals is at the first logic level,

a second couple of first and second means for respectively detecting said first and second transitions in said one, respectively said other one, of the first and second logic signals thereby deriving transition detection pulses when said other one, respectively said one, of the first and second logic signals is at said second logic level,

first means for combining said detection pulses derived by said first detecting means in said first couple and by said second detecting means in said second couple into said first pulses, and

second means for combining the detection pulses derived by said second detecting means in said first couple and said first detecting means in said second couple into said second pulses.

7. The system as claimed in claim 6, wherein each of said first and second detecting means comprises a monostable flip-flop, said monostable flip-flops in said first and second detecting means in each of said couples of said first and second respective pulse generating means respectively receiving directly and via an inverter means said one, respectively said other one, of the first and second logic signals, and said monostable flip-flops in said first and second couples being respectively reset in response to said second and first logic levels of said other one, respectively said one, of the first and second logic signals.