Linear and orthogonal expansion of array storage in multiprocessor computing systems

• US 5,237,658 A
• Filed: 10/01/1991
• Issued: 08/17/1993
• Est. Priority Date: 10/01/1991
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Tandem Computers Incorporated (HP Inc.)
• Inventors: Walker, Mark, Chan, Wing M., Sammer, Harald W., Fuller, William T., Lui, Albert S.
• Primary Examiner(s): RICHARDSON, ROBERT
• Application Number:
  US07/769,538
• Time in Patent Office: 686 Days
• Field of Search: 364/DIG. 1, 364/DIG. 2, 395/200, 395/275, 395/325, 395/425, 395/800, 395/575, 371/10.2
• US Class Current: 710/38
• CPC Class Codes: G06F 15/17375 One dimensional, e.g. linear array, ring

Abstract

A multiprocessing computer system with data storage array systems allowing for linear and orthogonal expansion of data storage capacity and bandwidth by means of a switching network coupled between the data storage array systems and the multiple processors. The switching network provides the ability for any CPU to be directly coupled to any data storage array. By using the switching network to couple multiple CPU'"'"'s to multiple data storage array systems, the computer system can be configured to optimally match the I/O bandwidth of the data storage array systems to the I/O performance of the CPU'"'"'s.

Claims

1. A multiprocessing computer system comprising:

a. a plurality of processing units;

b. at least one data storage array system, each having at least one array controller;

c. switching network means, coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system.

2. The multiprocessing computer system of claim 1, wherein the switching network means comprises a cross-point switch.

3. The multiprocessing computer system of claim 1, wherein the switching network means comprises a multi-stage switch.

8. The multiprocessing computer system of claim 1, wherein the switching network means is coupled to each array controller.

9. The multiprocessing computer system of claim 8, wherein the switching network means comprises a cross-point switch.

10. The multiprocessing computer system of claim 8, wherein the switching network means comprises a multi-stage switch.

4. A linearly and orthogonally expandable multiprocessing computer system comprising:

a. at least two processing units, each processing unit having a respective input/output data transfer rate;

b. at least one interprocessor bus for intercoupling the at least two processing units, the at least one bus having sufficient capacity to be coupled to at least one additional processing unit;

c. at least one data storage array system including at least two data storage units, at least one data storage array system having sufficient capacity to be coupled to at least one additional processing unit, each data storage array system having a respective input/output data transfer rate;

d. switching network means, coupled to the processing units and to at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system, the switching network means having an input/output data transfer rate;

wherein the input/output data transfer rate of the switching network means at least equals the sum of input/output data transfer rates of either the processing units or the data storage array systems, and additional data storage units may be added to at least one data storage array system to increase the sum of the input/output data transfer rates of the data storage array systems, and additional processing units may be added to the interprocessor bus to increase the sum of the input/output data transfer rates of the processing units.

5. The multiprocessing computer system of claim 4, further comprising additional data storage units or additional processing units so that the sum of the input/output data transfer rates of the processing units is matched to approximately equal the sum of the input/output data transfer rates of the data storage array systems.

6. The multiprocessing computer system of claim 4, wherein the switching network means comprises a cross-point switch.

7. The multiprocessing computer system of claim 4, wherein the switching network means comprises a multi-stage switch.

11. A multiprocessing computer system comprising:

a. a plurality of processing units;

b. at least one data storage array system, each having at least one array controller;

c. at least two switching network means, each coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a redundant communications link between at least one selected processing unit and at least one data storage array system.

12. The multiprocessing computer system of claim 11, wherein the switching network means comprises a cross-point switch.

13. The multiprocessing computer system of claim 11, wherein the switching network means comprises a multi-stage switch.

14. A multiprocessing computer system comprising:

a. a plurality of processing units;

b. at least one data storage array system, each having at least one array controller;

c. at least one switching network, coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system.

15. The multiprocessing computer system of claim 14, wherein at least one switching network comprises a cross-point switch.

16. The multiprocessing computer system of claim 14, wherein at least one switching network comprises a multi-stage switch.

17. The multiprocessing computer system of claim 14, wherein at least one switching network is coupled to each array controller of at least one data storage array system.

18. The multiprocessing computer system of claim 17, wherein at least one switching network comprises a cross-point switch.

19. The multiprocessing computer system of claim 17, wherein at least one switching network comprises a multi-stage switch.

20. A linearly and orthogonally expandable multiprocessing computer system comprising:

a. at least two processing units, each processing unit having a respective input/output data transfer rate;

b. at least one interprocessor bus for intercoupling the at least two processing units, the at least one bus having sufficient capacity to be coupled to at least one additional processing unit;

c. at least one data storage array system including at least two data storage units, at least one data storage array system having sufficient capacity to be coupled to at least one additional processing unit, each data storage array system having a respective input/output data transfer rate;

d. at least one switching network, coupled to the processing units and to at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system, each switching network having an input/output data transfer rate;

wherein the input/output data transfer rate of at least one switching network at least equals the sum of input/output data transfer rates of either the processing units or the data storage array systems, and additional data storage units may be added to at least one data storage array system to increase the sum of the input/output data transfer rates of the data storage array systems, and additional processing units may be added to the interprocessor bus to increase the sum of the input/output data transfer rates of the processing units.

21. The multiprocessing computer system of claim 20, further comprising additional data storage units or additional processing units so that the sum of the input/output data transfer rates of the processing units is matched to approximately equal the sum of the input/output data transfer rates of the data storage array systems.

22. The multiprocessing computer system of claim 20, wherein at least one switching network comprises a cross-point switch.

23. The multiprocessing computer system of claim 20, wherein at least one switching network comprises a multi-stage switch.

24. A multiprocessing computer system comprising:

a. a plurality of processing units;

b. at least one data storage array system, each having at least one array controller;

c. at least two switching networks, each coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a redundant communications link between at least one selected processing unit and at least one data storage array system.

25. The multiprocessing computer system of claim 24, wherein at least one switching network comprises a cross-point switch.

26. The multiprocessing computer system of claim 24, wherein at least one switching network comprises a multi-stage switch.

27. A data storage system for connection to a multiprocessing computer system including a plurality of processing units, the data storage system comprising:

a. at least one data storage array system, each having at least one array controller;

b. at least one switching network, adapted to be coupled to the plurality of processing units and to at least one array controller of at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system.

28. The data storage system of claim 27, wherein at least one switching network is coupled to each array controller.

29. The data storage system of claim 27, wherein at least one switching network comprises a cross-point switch.

30. The data storage system of claim 27, wherein at least one switching network comprises a multi-stage switch.

31. A linearly and orthogonally expandable data storage system for connection to a multiprocessing computer system comprising at least two processing units, each processing unit having a respective input/output data transfer rate, and at least one interprocessor bus for intercoupling the at least two processing units, the at least one bus having sufficient capacity to be coupled to at least one additional processing unit, the data storage system comprising:

a. at least one data storage array system including at least two data storage units, at least one data storage array system having sufficient capacity to be coupled to at least one additional processing unit, each data storage array system having a respective input/output data transfer rate;

b. at least one switching network, adapted to be coupled to the processing units and to at least one data storage array system, for establishing a communications link between at least one selected processing unit and at least one data storage array system, the switching network having an input/output data transfer rate;

wherein the input/output data transfer rate of at least one switching network at least equals the sum of input/output data transfer rates of either the processing units or the data storage array systems, and additional data storage units may be added to at least one data storage array system to increase the sum of the input/output data transfer rates of the data storage array systems, and additional processing units may be added to the interprocessor bus to increase the sum of the input/output data transfer rates of the processing units.

32. The data storage system of claim 31, further comprising additional data storage units of additional processing units so that the sum of the input/output data transfer rates of the processing units is matched to approximately equal the sum of the input/output data transfer rates of the data storage array systems.

33. The data storage system of claim 31, wherein at least one switching network comprises a cross-point switch.

34. The data storage system of claim 31, wherein at least one switching network comprises a multi-stage switch.