Voltage-controlled ring oscillator using complementary differential buffers for generating multiple phase signals

• US 5,239,274 A
• Filed: 05/26/1992
• Issued: 08/24/1993
• Est. Priority Date: 05/26/1992
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Digital Equipment Corporation (HP Inc.)
• Inventors: Chi, Kuang K.
• Primary Examiner(s): Grimm, Siegfried H.
• Application Number:
  US07/888,762
• Time in Patent Office: 455 Days
• Field of Search: 331/57, 331/108 B, 331/177 R, 307/602, 307/603, 307/605, 307/606, 307/608
• US Class Current: 331/57
• CPC Class Codes: H03B 2200/0062 Bias and operating point
• CPC Class Codes: H03B 2201/02 Varying the frequency of the oscillations by electronic means
• CPC Class Codes: H03B 27/00 Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
• CPC Class Codes: H03B 5/20 with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator
• CPC Class Codes: H03K 3/0231 Astable circuits H03K3/0315 takes precedence
• CPC Class Codes: H03K 3/0322 with differential cells

Abstract

Differential buffers are used in a voltage-controlled oscillator to provide pairs of complementary phase signals. The preferred arrangement includes a ring of the differential buffers. Each differential buffer has a current control input, and the current control inputs of the buffers are all connected to a control voltage input to simultaneously adjust the propagation delay of each of the buffers. In contrast to a conventional ring oscillator, which has an odd number of stages, a ring oscillator made of differential buffers can have an even number of buffers to provide a number of phases that is a multiple of four. The differential buffer preferably includes a pair of CMOS inverters sharing a common PMOS current sourcing transistor and a common NMOS current sinking transistor.

Claims

1. A multi-phase voltage-controlled oscillator comprising:

a ring of differential buffers;

each of said differential buffers having a current control input for regulating current through the differential buffer, a pair of differential outputs, and a pair of differential inputs, at least one of said differential inputs being connected to at least one differential output of a prior one of said differential buffers in said ring; and

a control voltage input connected to each of said current control inputs of said differential buffers in said ring for simultaneously adjusting current through all of said differential buffers in said ring in response to a control voltage on said control voltage input;

wherein said ring of differential buffers has an even number of said differential buffers, and each of said differential buffers includes;

a pair of CMOS inverters, each of said inverters including a PMOS transistor and an NMOS transistor, and each of said inverters having a respective one of said differential inputs and having a respective one of said differential outputs;

a PMOS current source transistor sourcing current to both of the CMOS inverters; and

an NMOS current sink transistor sinking current from both of the CMOS inverters.

2. A multi-phase voltage-controlled oscillator comprising:

a ring of differential buffers;

each of said differential buffers having a current control input for regulating current through the differential buffer, a pair of differential outputs, and a pair of differential inputs, at least one of said differential inputs being connected to at least one differential output of a prior one of said differential buffers in said ring; and

a control voltage input connected to each of said current control inputs of said differential buffers in said ring for simultaneously adjusting current through all of said differential buffers in said ring in response to a control voltage on said control voltage input;

wherein said ring of differential buffers has an even number of said differential buffers, and each of said differential buffers includes;

a pair of CMOS inverters, each of said inverters including a PMOS transistor and an NMOS transistor, and each of said inverters having a respective one of said differential inputs and having a respective one of said differential outputs;

a PMOS current source transistor sourcing current to both of the CMOS inverters; and

an NMOS current sink transistor sinking current from both of the CMOS inverters; and

wherein said multi-phase voltage-controlled oscillator further includes means for avoiding a possibility of a lock-up condition in said ring of differential buffers.

3. The multi-phase voltage-controlled oscillator as claimed in claim 2, wherein said means for avoiding a possibility of a lock-up condition comprises a threshold bias generator supplying a threshold bias signal to one of the differential inputs of each of said differential buffers in said ring of differential buffers.

4. The multi-phase voltage-controlled oscillator as claimed in claim 2, wherein said CMOS transistors are standard digital logic CMOS transistors causing said possibility of a lockup condition in said ring of differential buffers.

5. A multi-phase voltage-controlled oscillator comprising:

a ring of differential buffers;

each of said differential buffers having a current control input for regulating current through the differential buffer, a pair of differential outputs, and a pair of differential inputs, at least one of said differential inputs being connected to at least one differential output of a prior one of said differential buffers in said ring; and

a control voltage input connected to each of said current control inputs of said differential buffers in said ring for simultaneously adjusting current through all of said differential buffers in said ring in response to a control voltage on said control voltage input;

wherein said ring of differential buffers has an even number of said differential buffers, and each of said differential buffers includes;

a pair of CMOS inverters, each of said inverters including a PMOS transistor and an NMOS transistor, and each of said inverters having a respective one of said differential inputs and having a respective one of said differential outputs;

a PMOS current source transistor sourcing current to both of the CMOS inverters; and

an NMOS current sink transistor sinking current from both of the CMOS inverters; and

wherein said multi-phase voltage-controlled oscillator further includes a threshold bias generator supplying a threshold bias signal to one of the differential inputs of each of said differential buffers in said ring of differential buffers, thereby avoiding a possibility of a lock-up condition in said ring of differential buffers.

6. The multi-phase voltage-controlled oscillator as claimed in claim 5, wherein said CMOS transistors are standard digital logic CMOS transistors causing said possibility of a lockup condition in said ring of differential buffers.