Video display system providing for synchronization of multiple video data streams

• US 5,241,389 A
• Filed: 07/29/1991
• Issued: 08/31/1993
• Est. Priority Date: 07/29/1991
• Status: Expired due to Fees

• Current Assignee: Intelligent Resources Integrated Systems Incorporated
• Original Assignee: Intelligent Resources Integrated Systems Incorporated
• Inventors: Bilbrey, Brett C.
• Primary Examiner(s): Groody, James J.
• Assistant Examiner(s): BURGESS, GLENTON B
• Application Number:
  US07/737,406
• Time in Patent Office: 764 Days
• Field of Search: 358/181, 358/160, 358/149, 358/22, 358/183, 358/185
• US Class Current: 348/552
• CPC Class Codes: G09G 5/12 Synchronisation between the display unit and other units, e.g. other display units, video-disc players
• CPC Class Codes: H04N 5/262 Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects

Abstract

A video display system is provided which compensates for video processing delays in multiple, inter-coupled video processing subsystems. The video display system is comprised of multiple video processing subsystems, each having a video bus for coupling video data between individual ones of the multiple subsystems. Each subsystem is adapted to receive one or more video data inputs and to selectively and programmably process the one or more video data inputs to provide a video data output. Each subsystem is comprised of a video delay subsystem coupled to an external video source and to the video bus. The video delay subsystem adds a programmable time delay to its respective external video source input data prior to coupling it to its respective processor for processing of video data contained within that respective video processing subsystem. The programmable delay adequately compensates and time correlates its external video source input and the video bus coupled video input prior to providing those data signals to be selectively processed (blend, fade, mix, etc.) to provide its respective video data output, responsive to control signals received from either the video bus or the main computer bus. The external video source can be any of a number of video sources. Video data output from a first subsystem is coupled via the video bus to one or more other subsystems. The video bus couples video data and control signals amongst the multiple video processing subsystems.

Claims

1. A video display system comprising:

a video bus;

a plurality of video processing subsystems each coupled to the video bus, each subsystem comprising an external video data input, a bus video data input, an external video data output, and a bus video data output, each subsystem providing means for processing of video data received from at least one of said external video data input and said bus video data input and providing respective video data output to at least one of said external video data output and said bus video data output responsive to control data output from at least one of said subsystems;

wherein at least two of the video processing subsystems are inter-coupled wherein the bus video data output is provided from one of the video processing subsystems and coupled via the video bus to a subsequent one of the video processing subsystems as said bus video data input thereto;

wherein each means for processing provides a predefined processing time delay between its respective ones of said video data inputs and its corresponding respective ones of said video data outputs,

wherein each video processing subsystem is further comprised of delay means for adding a programmable time delay to at least one of its respective ones of said video data inputs prior to coupling the respective video data inputs to the means for processing of video data.

2. The system as in claim 1,

wherein there are a plurality of video processing subsystems intercoupled via the video bus to provide video data output to the subsequent subsystem'"'"'s video data input,

wherein the delay programmed for each subsequent one of the delay means is adequate to compensate for all previous video processing subsystems processing delays, so as to time correlate the video data inputs and outputs.

3. The system as in claim 1 further comprising:

video bus interface means for coupling video data input and output signals between the intercoupled ones of the video processing subsystems.

4. A video display system as in claim 1,

wherein the processing time delay is a constant time delay.

5. The video display system as in claim 4, further characterized in that each video processing subsystem operates so as to add one processing unit delay between the video data input to the respective video processing subsystem and the video data output from the respective video processing subsystem, further characterized in that the video data input and output signals are comprised of pixel data having an associated fixed pixel delay,

wherein the processing unit delay is equal to a multiple of pixel delays.

6. The system as in claim 5, further comprising:

input means for providing control signals;

wherein the programmable delay means is further comprised of a control register responsive to said control signal for providing a selectively programmable time delay value.

7. The system as in claim 6, further comprising:

means for providing a clock signal cycling at a fixed period, wherein the time delay is equal to the clock signal fixed period multiplied by the programmable time delay value.

8. The system as in claim 1, further characterized in that said delay means further provides means for selectively masking video data input so as to provide selectively masked video data output responsive to said control signals.

9. The system as in claim 6, wherein at least one of the intercoupled video processing subsystem is coupled to an external video source to receive video data input therefrom, wherein the respective delay means for said external video source is selectively programmable responsive to the control signal, to delay the source video data input from the external video source so as to time synchronize it to the respective video data input from the video bus prior to coupling the video data inputs from the external source and the video bus to the means for processing.

10. The system as in claim 9 wherein the means for processing of video data is further comprised of means for providing at least one video effect, on a pixel by pixel basis, on the external video source and video bus video data inputs.

11. The system as in claim 10, wherein there is a plurality of different video effects which can alternatively and selectively be applied on a pixel by pixel basis.

12. The system as in claim 11, wherein the different video effects are comprised of at least two video effects of:

blend, fade, mix, wipe, mosaic, posterization and solarization.

13. The system as in claim 9 wherein the external video source is comprised of at least one of video camera, video tape deck, computer, and laser disk.

14. The system as in claim 6, for receiving a clock signal and a command signal;

wherein the input means for providing the control signal output is responsive to the command and clock signals.

15. The system as in claim 14, wherein said input means is comprised of a serial interface.

16. The system as in claim 14, wherein said input means is comprised of a parallel interface.

17. The system as in claim 1, wherein said video data input signal is a multiple bit digital signal.

18. The system as in claim 1, wherein said video data output is a multiple bit digital signal.

19. A video display system comprising:

a video bus;

multiple video processing subsystems for receiving video input data and providing video output data, each coupled for communications via said video bus, each providing means for processing of video input data to provide video output data, each video processing subsystem being coupled to an external video source which outputs source video data input, each subsystem comprising an external video data input, a bus video data input, an external video data output, and a bus video data output, each subsystem providing means for processing of video data received from at least one of said external video data input and said bus video data input and providing respective video data output from at least one of said external video data output and said bus video data output responsive to control data output from at least one of said subsystem;

wherein said video bus provides means for coupling of said bus video data input said bus video data output, and said control data;

wherein video data output from a previous one of the video processing subsystems is coupled by the video bus as video data input to another one of the video processing subsystems,

wherein each video processing subsystem provides a processing time delay between its respective one of said video input data from the external video source and its respective corresponding output of video output data to the video bus,

wherein each of the video processing subsystems is further comprised of delay means for adding a programmable time delay to its respective one of said source video data input from the external video source prior to coupling the source video data input to the means for processing of video.

20. The system as in claim 19, wherein the programmable time delay is selected so as to compensate for the previous video processing subsystems processing delays, so as to time correlate and synchronize the source video input data from the external video source and the corresponding video input data from the video bus.

21. The system as in claim 20, further comprising:

means for providing a control signal, wherein said programmable time delay is set responsive to said control signal.

22. A video control system, comprising:

(a) control input means for receiving externally supplied control signals;

(b) video bus input means for receiving an externally supplied multiple bit bus video input signal;

(c) means for receiving a source video data input signal from an external video source;

(d) video processing means for providing a multiple bit video output signal responsive to at least one of the source and bus video input signals, and to the control signals,

wherein the video processing means is further comprised of;

delay means for selectively delaying one of the source and bus video input signals and providing the video output data time delayed relative to the video input data, responsive to the control signals; and

first masking means for selectively forcing certain ones of said multiple bits of said video output signal to an active logic level, responsive to the control signals.

23. The system as in claim 22, wherein the control signals are JTAG.

24. The system as in claim 22, wherein the control signals are IMBUS.

25. The system as in claim 22, wherein the multiple bit video input signal is 32 bits.

26. The system as in claim 22, wherein the multiple bit video output signal is 32 bits.

27. The system as in claim 22, wherein video processing means is further comprised of:

control register means, responsive to the control signals, comprising three sections, one for storing a delay value, one for storing an active masking value, and one for storing an inactive masking value;

wherein the delay means is responsive to the delay value for determining the amount of delay;

wherein the first masking means is responsive to the active mask value; and

wherein the second masking means is responsive to the inactive mask value.

28. The system as in claim 22, wherein when both the first and second masking means select the same bit, the active mask takes precedence.

29. The system as in claim 22, wherein the delay means and first and second masking means can function simultaneously on the same video input data.

30. An interface system comprising:

a video bus for coupling of video bus data signals;

multiple video processing systems, each of which performs video processing on its respective ones of multiple bit video input signals from at least one of an external video data input and a video bus data input, to produce its own respective one of multiple bit video output signals which are time-delayed by a predefined amount relative to its respective one of the corresponding video input signal;

wherein each video processing system further includes a delay subsystem for selectively adding a programmed time-delay to one of its respective video input signals responsive to a delay control signal;

wherein the video output of a first of said video processing systems, is coupled as the video input signal to a second one of said video processing systems,

means for providing a delay control signal for the second processing system selected to produce a delay equal to the predefined amount for said first video processing system.

31. The system as in claim 30, wherein each video processing system can have a unique and different predefined amount of delay.