Compact high density interconnect structure

• US 5,241,456 A
• Filed: 07/02/1990
• Issued: 08/31/1993
• Est. Priority Date: 07/02/1990
• Status: Expired due to Fees

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: General Electric Company
• Inventors: Marcinkiewicz, Walter M., Eichelberger, Charles W., Wojnarowski, Robert J.
• Primary Examiner(s): Donovan, Lincoln
• Assistant Examiner(s): SPARKS, DONALD ALAN
• Application Number:
  US07/548,462
• Time in Patent Office: 1,156 Days
• Field of Search: 174/250, 174/251, 174/253, 174/255, 174/260, 174/261, 357/68, 357/69, 357/70, 357/71, 357/72, 357/73, 357/74, 357/80, 361/395, 361/396, 361/397, 361/400, 361/401, 361/404, 361/405, 361/409, 361/410, 361/412, 361/413, 361/414, 361/417, 361/419, 361/421, 439/68, 439/69, 439/71, 428/209, 428/901, 29/878
• US Class Current: 361/792
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/24137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/24225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/24227 the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2224/82039 using a laser
• CPC Class Codes: H01L 23/5384 Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors H01L23/5383, H01L23/5385 take precedence; pins attached to insulating substrates H01L23/49811
• CPC Class Codes: H01L 23/5385 Assembly of a plurality of insulating substrates
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/105 the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01015 Phosphorus [P]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01039 : Yttrium [Y]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15165 : Monolayer substrate
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/1627 : stacked type assemblies, e.g. stacked multi-cavities

Abstract

An improved high density interconnect structure may include electronic components mounted on both sides of its substrate or a substrate which is only as thick as the semiconductor chips which reduces the overall structure thickness to the thickness of the semiconductor chips plus the combined thickness of the high density interconnect structure'"'"'s dielectric and conductive layers. In the two-sided structures, feedthroughs, which are preferably hermetic, provide connections between opposite sides of the substrate. Substrates of either of these types may be stacked to form a three-dimensional structure. Means for connecting between adjacent substrates are preferably incorporated within the boundaries of the stack rather than on the outside surface thereof.

Claims

1. An electronic system comprising:

a plurality of segments, each of said segments comprising;

a substrate having a perimeter and first and second sides having first and second major surfaces, respectively, and a plurality of feedthrough conductors extending through said substrate, each of said feedthrough conductors having first and second ends associated respectively with said first and second sides of said substrate.

an electronic component having contact pads on a contact surface thereof, said electronic component being disposed with its contact surface in substantially the plane of said first major substrate surface, and

a high density interconnect structure bonded to said electronic component and said first major surface of said substrate, said high density interconnect structure including dielectric material and a pattern of conductors disposed on or in said dielectric material, said pattern of conductors including conductors electrically connected to said contact pads of said electronic component and conductors electrically connected to said feedthrough conductors;

said segments being arranged in a stack, said stack comprising;

means for electrically connecting conductors of different, adjacent ones of said segments to each other at adjacent surfaces of said adjacent segments, said means for electrically connecting being disposed within the perimeters of both of said adjacent substrates, and

a base segment having a given substrate size and a stack segment having a smaller substrate, said base segment having a seal ring on said first major surface thereof; and

a sidewall sealed to said seal ring for enclosing said stack substrate in an enclosure comprising said substrate of said base segment and said sidewall.

2. The system recited in claim 1 wherein:

said first ends of said feedthrough conductors are disposed substantially flush with said first major surface of said substrate and said pattern of conductors connects to said feedthrough conductors in substantially the same manner in which it connects to said contact pads.

3. The system recited in claim 1 wherein:

at adjacent surfaces of adjacent segments, the ends of said feedthrough conductors are disposed substantially flush with their associated major substrate surfaces.

4. The system recited in claim 1 wherein:

said base segment includes a second seal ring disposed on the second major surface of said base substrate;

a second sidewall sealed to said second seal ring for enclosing a second stack substrate in an enclosure comprised of said base substrate and said second sidewall.

5. The system recited in claim 1 wherein:

a first one of said substrates has a second electronic component disposed on its second major surface.

6. The system recited in claim 5 wherein:

said first substrate has a second high density interconnect structure bonded to said second major surface thereof and to said second electronic component.

7. The system recited in claim 1 wherein:

said means for electrically connecting comprises fuzz buttons.

8. The system recited in claim 1 wherein:

said means for electrically connecting comprises solder.

9. The system recited in claim 1 wherein:

said means for electrically connecting comprises a polymer loaded with conductive material.

10. The system recited in claim 1 wherein:

a portion of said system is enclosed in a hermetic enclosure; and

said substrate of a first one of said segments comprises a portion of said hermetic enclosure.

11. The system recited in claim 10 wherein:

the substrate of said first segment is larger than some others of said substrates;

said substrate of said first segment is sealed to the remainder of an enclosure in which those other substrates are disposed to complete said hermetic enclosure.

12. The system recited in claim 10 wherein:

said enclosure comprises bottom, top and side walls; and

said bottom comprises a substrate of said stack.

13. The system recited in claim 12 wherein:

said side wall comprises a member bonded to the edges of said substrates in said stack.