Nonvolatile ramdisk memory

• US 5,241,508 A
• Filed: 04/03/1991
• Issued: 08/31/1993
• Est. Priority Date: 04/03/1991
• Status: Expired due to Fees

• Current Assignee: Leonardo P. Berenguel
• Original Assignee: Peripheral Land, Inc.
• Inventors: Reykjalin, John, Berenguel, Leo P.
• Primary Examiner(s): Mullins, James B.
• Application Number:
  US07/679,612
• Time in Patent Office: 881 Days
• Field of Search: 365/229, 307/66, 307/64, 371/14, 371/66
• US Class Current: 365/229
• CPC Class Codes: G11C 14/00 Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
• CPC Class Codes: G11C 5/143 Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels G11C5/148 takes precedence; Switching between alternative supplies G11C5/141 takes precedence

Abstract

A nonvolatile memory system for a host computer system including a nonvolatile memory and a volatile random access memory that is chosen because of its short access time. When main power to the host system and RAMDISK is interrupted, data stored in the volatile memory is automatically transferred to the nonvolatile memory where it is stored until power is restored. When main power is restored, the data is automatically returned to the volatile memory. The RAMDISK memory features a power monitoring circuit that detects when main power is interrupted and switches the system onto a battery backup power source in order to power the RAMDISK while data transfer takes place. After power has been restored, the backup battery is recharged automatically by the monitoring circuit.

Claims

1. A memory system connectable to a host computer system operated with power from a main power source which comprises:

a volatile memory means for storing data which loses said data when said power is interrupted;

a nonvolatile memory means for storing said data and which retains said data when power is interrupted;

means connected to said host system and said volatile memory means for transmitting said data between said host computer system and said volatile memory means;

means connected to said volatile memory means and to said nonvolatile memory means for transferring said data between said volatile memory means and said nonvolatile memory means;

means connected to said transferring means and to said transmitting means for directing said transmitting means to transmit data between said volatile memory and said host system and directing said transferring means to transfer data between said volatile and said nonvolatile memory means;

a means connected to said directing means for monitoring power from said main power source providing that, when said main power is interrupted, said memory system is connected to a backup power source and said directing means directs said transfer means to transfer data from said volatile memory means to said nonvolatile memory means and, when main power is restored, said directing means directs said transfer means to transfer said data from said nonvolatile memory to said volatile memory;

said directing means having a signal terminal indicating end of data;

said monitoring means comprising;

an output terminal means attachable to said directing means;

a main power terminal means attachable to said main source of power;

a means for rectifying having one terminal connected to said main power terminal means and another terminal connected to said output terminal means, thereby permitting current to flow from said main power terminal means to said directing means, but preventing current from flowing from said directing means to said main power terminal means;

a backup power terminal means connectable to a source for supplying backup power;

a backup power switch having a first terminal connected to said backup power terminal means, a second terminal connected to said output terminal means and a control terminal for controlling said switch;

a logic NAND circuit having an output terminal connected to said control terminal, a first input terminal connected to said terminal indicating end of data, and a second input terminal;

a connection between said second input NAND terminal and a terminal in said directing means;

a means for detecting interruption of main power having an input terminal connected to said main power terminal, and an interrupt signal terminal connected to said second input NAND terminal;

a means for charging said backup power source having an input terminal connected to said main power terminal means, an output charging terminal connected to said backup power terminal means, and a charging control terminal; and

a means for comparing two voltages having a first compare terminal connected to said main power terminal means, a second compare terminal connected to said backup power terminal means, and a signal terminal connected to said charging control terminal, thereby providing that when voltage from said backup power source is less than a full charge voltage signal proportional to said main power, a signal on said signal terminal will cause said charging means to pass charging current from said main power terminal means to said backup power terminal means.

2. A memory system as in claim 1 wherein said nonvolatile memory comprises a memory disk.

3. A memory system as in claim 1 wherein said volatile memory comprises:

a DRAM memory

a DRAM controller connected to said DRAM memory.

4. A memory system as in claim 1 wherein said data transmitting means comprises:

a first SCSI bus having an end connectable to said host system;

a first SCSI controller connected to another end of said first SCSI bus, and to said directing means.

5. A memory system as in claim 4 wherein said data transferring means comprises:

a second SCSI bus having an end connected to said nonvolatile memory means;

a second SCSI controller connected to another end of said second SCSI bus and to said directing means.

6. A memory system as in claim 1 wherein said backup power source is a battery.

7. A memory system as in claim 1 wherein said directing means comprises a microprocessor.

8. A memory system as in claim 7 wherein said microprocessor comprises:

a central processor unit connected to said transmitting, monitoring, and transferring means;

a ROM memory connected to said central processor unit into which program may be stored.

9. An apparatus for switching a system from a main power source to a backup power source when said main power is interrupted to permit said system to perform an emergency operation using backup power, which operation includes emitting on a terminal of said system a signal indicating end of said operation, said apparatus comprising:

an output terminal means attachable to said system;

a main power terminal means attachable to said main source of power;

a means for rectifying having one terminal connected to said main power terminal means and another terminal connected to said output terminal means, thereby permitting current to flow from said main power terminal means to said system but preventing current from flowing from said output terminal means to said main power terminal means;

a backup terminal means adapted for connection to said backup power source;

a backup power switch having a first terminal connected to said backup power terminal means, a second terminal connected to said output terminal, and a control terminal for opening and closing said backup power switch;

a means for detecting interruption of main power having an input terminal connected to said main power, and a power interrupt terminal;

a logic NAND having an input terminal connected to said interrupt signal terminal, another input terminal connected to said end of signal terminal, and an output terminal connected to said control terminal providing that when said main power is interrupted, a signal on said interrupt signal terminal will close said backup power switch permitting power to flow from said backup power source to said system which then performs said operation and emits an end-of-the-operation signal, thereby interrupting said power flowing to said system;

a means of recharging said backup power source having an input terminal connected to said main power terminal means, an output charging terminal connected to said backup power terminal means, and a charging control terminal;

a means for comparing two voltages having a first compare terminal connected to said main power terminal means, a second compare terminal connected to said backup power terminal means, and a signal terminal connected to said charging control terminal thereby providing that when voltage from said backup power source is less than a full charge voltage signal proportional to voltage from said main power source, a signal on said signal terminal will cause said charging means to pass charging current from said main power terminal means to said backup power terminal means.