Apparatus and method for detecting failure of an external device by a microcomputer

• US 5,243,606 A
• Filed: 12/21/1989
• Issued: 09/07/1993
• Est. Priority Date: 04/28/1989
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Muramatsu, Kikuo, Sugita, Mitsuru
• Primary Examiner(s): Beausoliel, Jr., Robert W.
• Assistant Examiner(s): LO, ALLEN
• Application Number:
  US07/455,489
• Time in Patent Office: 1,356 Days
• Field of Search: 371/29.1, 371/16.5, 371/69.1, 371/16.3, 371/24, 371/25.1, 371/26, 371/70, 371/67.1, 364/424.03, 364/424.04
• US Class Current: 714/822
• CPC Class Codes: G05B 9/02 electric
• CPC Class Codes: G06F 11/0751 Error or fault detection not based on redundancy power supply failures G06F1/30; network fault management H04L41/06
• CPC Class Codes: G06F 11/0757 by exceeding a time limit, i.e. time-out, e.g. watchdogs

Abstract

The microcomputer of the invention comprises a flip-flop which repeats setting and resetting of a monitor signal. The monitor signal is delivered from an external device in response to a PWM output signal for driving the external device. The flip-flop sets and resets at the front edge, of the monitor signal. The invention detects a failure of the external device according to the presence or absence of inversion of its held value. Hence, the failure of the external device operating at high speeds can be reliably detected by the microcomputer of the invention.

Claims

1. A microcomputer for use in detecting failure in an external device, said external device supplying a state signal in response to a pulse signal, comprising:

means for generating a pulse signal for driving said external device;

signal holding means for holding a value in response to said state signal supplied from said external device and indicative of the state of said external device, and updating a holding value at every supplying period wherein the value held in said signal holding means changes state in response to a forward edge of said state signal; and

failure detecting means for detecting a failure of said external device by comparing the holding value updated by said holding means with the held value updated one period before.

2. A microcomputer as set forth in claim 1, wherein said signal holding means is comprised of one or plural stages of flip-flops.

3. A microcomputer for use in detecting failure in an external device, said external device supplying a state signal in response to a pulse signal, comprising:

means for generating a pulse signal for driving said external device;

signal holding means for holding a value in response to said state signal supplied from said external device and indicative of the state of said external device, and updating a holding value at every supplying period wherein the value held in said signal holding means changes state in response to a forward edge of said state signal; and

failure detecting means for detecting a failure of said external device on the basis of the holding value updated by said holding means; and

wherein said signal holding means is comprised of a counter.

4. A method for detecting failure in an external device, said external device receiving a pulse signal with a plurality of pulses defining a plurality of periods of said pulse signal, said external device supplying a state signal in response to said pulse signal, the state signal having a plurality of edges including at least predetermined type of edge, the method comprising

toggling a held signal between two states whenever there is said predetermined type of edge in said state signal;

and

detecting failure by comparing with held value updated one period before to determine whether said held signal inverts at each period of said pulse signal.

5. A method for detecting failure in an external device, said external device receiving a pulse signal with a plurality of pulses defining a plurality of periods of said pulse signal, said external device supplying a state signal in response to said pulse signal, the state signal having a plurality of edges including at least predetermined type of edge, the method comprising

toggling a held signal between two states whenever there is said predetermined type of edge in said state signal;

detecting failure by determining whether said held signal inverts at each period of said pulse signal; and

wherein said step of detecting includes storing an indication of the value of said held signal and comparing said stored indication to a current value of said held signal.

6. A method, as claimed in claim 5, wherein said storing includes storing in a single latch.

7. A method, as claimed in claim 5, wherein said storing includes storing in at least two latches.

8. Apparatus for use in a device for detecting failure of an external device, said external device receiving a pulse signal, said external device supplying a state signal in response to said pulse signal, the state signal having a plurality of edges including at least predetermined type of edge, the apparatus comprising:

a comparator having an input which determines whether a signal provided at said input is inverted with respect to a previous signal;

an edge detector having an input and an output which toggles the level of a signal at its output between first and second levels in response to detecting an edge of said predetermined type in a signal supplied at said input;

means for supplying said state signal to said input of said edge detector; and

means for supplying the signal from the output of said edge detector to the input of the comparator.

9. Apparatus for detecting failure of an external device, said external device receiving a pulse signal, said external device supplying a state signal in response to said pulse signal, the state signal having a plurality of rising edges, the apparatus comprising:

a pulse signal generator having an output coupled to said external device;

a flip-flop having an input and an output which receives said state signal at said input and toggles the level of a held signal at its output between first and second levels in response to a rising edge in said state signal;

at least one latch for storing said held signal received from said flip-flop during one period of said pulse signal;

logic gates for receiving said stored held signal and a current held signal and outputting a detection signal if said stored held signal is not inverted from said current held signal.