Clamp for testing used integrated circuit devices

• US 5,245,277 A
• Filed: 08/04/1992
• Issued: 09/14/1993
• Est. Priority Date: 08/04/1992
• Status: Expired due to Term

• Current Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Original Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Inventors: Nguyen, Justin A.
• Primary Examiner(s): NGUYEN, VINH P
• Application Number:
  US07/924,816
• Time in Patent Office: 406 Days
• Field of Search: 324/72.5, 324/158 F, 324/158 P, 439/68, 439/69, 439/70, 439/73
• US Class Current: 324/750.25
• CPC Class Codes: G01R 1/0433 Sockets for IC's or transistors

Abstract

A clamp for a test socket for testing packaged integrated circuit devices, particularly used devices, includes grooves corresponding to original pin locations of the integrated circuit device. When an integrated circuit device having misaligned pins is placed in the test socket and the clamp is set upon the integrated circuit device and manually shifted against the integrated circuit device, grooves receive the pins, aligning any misaligned pins properly against contacts in the socket. Closing the socket causes the pins to be firmly aligned against the contacts for testing.

Claims

1. A structure for holding an integrated circuit device during testing comprising:

a clamp comprising;

a body sized to support an integrated circuit device; and

a plurality of grooves, each of said grooves sized and positioned to correspond to a pin in said integrated circuit device;

a socket structure comprising;

a base comprising;

a plurality of contacts spaced to correspond to spacing of pins in said integrated circuit device to be tested,

alignment posts sized to hold said integrated circuit device in position against said contacts; and

a lid comprising;

means for pressing said clamp against said integrated circuit device;

whereby when said lid is closed against said base with said clamp holding an integrated circuit device positioned in said socket, pins of said integrated circuit device are positioned against respective ones of said contacts for testing said integrated circuit device.

2. A structure for holding an integrated circuit device during testing as in claim 1 in which said clamp is formed from a hard plastic material.