Microprocessor-controlled apparatus with improved disabling
First Claim
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1. An apparatus comprising:
- a control microprocessor,a first memory, accessible to said microprocessor, for storing a security code,protection means coupled to and including circuitry within said microprocessor, comprising means for user entry of a legitimation code;
responsive to occurrence of a given condition, said protection means blocking normal operation of the apparatus in the absence of user entry of a legitimation code corresponding to said security code, andmeans for disabling said protection means, including a non-volatile memory for storing a security variable whose value indicates whether or not said protection means is disabled,characterized in that said microprocessor comprises an internal memory for storing a code series consisting of a plurality of bits, andto indicate that said protection means is disabled, said means for disabling assigns a value corresponding to said code series to said security variable and stores such value in said non-volatile memory;
while to indicate that said protection means is not disabled, a value of security variable independent of said code series is stored in said non-volatile memory.
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Abstract
Microprocessor-controlled apparatus, for example, a car radio whose microprocessor (5) is one-time programmable by the manufacturer of the apparatus. An external non-volatile memory (7) comprises a security variable (VAR) indicating whether the protection means is operational. In addition to a security code (SC), an arbitrary code series (KEY) of, for example, 20 bits is stored in the internal memory (51) of the microprocessor. Unauthorized disabling of the protection means by external interrogation of the non-volatile memory is only possible by assigning a value which corresponds to the code series to the security variable. However, the code series is inaccessible and can only be traced with great difficulty by means of trial and error methods.
30 Citations
12 Claims
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1. An apparatus comprising:
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a control microprocessor, a first memory, accessible to said microprocessor, for storing a security code, protection means coupled to and including circuitry within said microprocessor, comprising means for user entry of a legitimation code;
responsive to occurrence of a given condition, said protection means blocking normal operation of the apparatus in the absence of user entry of a legitimation code corresponding to said security code, andmeans for disabling said protection means, including a non-volatile memory for storing a security variable whose value indicates whether or not said protection means is disabled, characterized in that said microprocessor comprises an internal memory for storing a code series consisting of a plurality of bits, and to indicate that said protection means is disabled, said means for disabling assigns a value corresponding to said code series to said security variable and stores such value in said non-volatile memory;
while to indicate that said protection means is not disabled, a value of security variable independent of said code series is stored in said non-volatile memory. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An apparatus comprising:
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a control microprocessor, a first memory, accessible to said microprocessor, for storing a security code, protection means coupled to and including circuitry within said microprocessor, comprising means for user entry of a legitimation code;
responsive to occurrence of a given condition, said protection means blocking normal operation of the apparatus in the absence of user entry of a legitimation code corresponding to said security code, andmeans for disabling said protection means, including a non-volatile memory for storing a security variable whose value indicates whether or not said protection means is disabled, characterized in that said microprocessor comprises an internal memory for storing a code series consisting of a multiplicity of bits, to indicate that said protection means is disabled, said means for disabling assigns a value corresponding to said code series to said security variable and stores such value in said non-volatile memory;
while to indicate that said protection means is not disabled, a value of security variable independent of said code series is stored in said non-volatile memory, andresponsive to occurrence of said given condition and the value of said security variable being different from said code series, said protection means blocks normal operation of the apparatus only after expiration of a predetermined time delay following initiation of normal operation. - View Dependent Claims (12)
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Specification
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Current AssigneeUS Philips Corporation (Koninklijke Philips N.V.)
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Original AssigneeUS Philips Corporation (Koninklijke Philips N.V.)
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InventorsWassink, Derk J. C.
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Primary Examiner(s)Yusko, Donald J.
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Assistant Examiner(s)Hill, Andrew M.
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Application NumberUS07/757,096Time in Patent Office735 DaysField of Search340/825.31, 340/825.32, 340/825.34, 340/568, 340/571, 340/825.3, 307/10.2, 364/184US Class Current340/5.28CPC Class CodesG07C 9/0069 actuated in a predetermined...G07C 9/33 by means of a password
