Methodology for manufacturing hinged diaphragms for semiconductor sensors

• US 5,245,504 A
• Filed: 08/06/1992
• Issued: 09/14/1993
• Est. Priority Date: 02/28/1989
• Status: Expired due to Fees

• Current Assignee: United Technologies Corporation (Raytheon Technologies Corporation d/b/a RTX)
• Original Assignee: United Technologies Corporation (Raytheon Technologies Corporation d/b/a RTX)
• Inventors: Bullis, Robert H., Swindal, James L., Foyt, Arthur G.
• Primary Examiner(s): Reynolds, Bruce A.
• Assistant Examiner(s): SWITZER, MICHAEL
• Application Number:
  US07/906,598
• Time in Patent Office: 404 Days
• Field of Search: 361/283, 29/25.42, 73/718, 73/724
• US Class Current: 361/283.4
• CPC Class Codes: G01L 9/0042 Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms details about the integration or bonding of piezoresistor in or on the diaphragm G01L9/0052 and G01L9/0057 respectively
• CPC Class Codes: G01L 9/0073 using a semiconductive diaphragm
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: G01P 2015/084 the mass being suspended at more than one of its sides, e.g. membrane-type suspension, so as to permit multi-axis movement of the mass
• CPC Class Codes: Y10T 29/435 Solid dielectric type

Abstract

Manufacturing hinged diaphragms for semiconductor sensors (e.g., accelerometers, pressure transducers, etc.), from a SIMOX wafer (W, FIG. 3 A), in which the internal, insulating, silicon dioxide (SiO₂) layer (3) is used as an etch stop in removing silicon from the underside of the wafer by etching with an appropriately selective etch, producing the reduced thickness, peripheral "hinge" areas (9; FIG. 3 A to FIG. 3 B), with the exposed part of the silicon dioxide layer being removed in a subsequent etching step (FIG. 3 B to FIG. 3C) using a different, selective etch. This produces a single layer, single-crystal, silicon "hinge" (9'"'"'; FIG. 3C) of uniform, continuous material, enhancing the linearity of diaphragm movement during use and the sensor'"'"'s sensitivity and accuracy. (See FIG. 4 for methodological steps.) If the top, silicon region of the SIMOX wafer is insufficiently thick for the desired diaphragm thickness, additional layer(s) of epitaxial silicon are grown on the upper side of the silicon crystal until the desired thickness is reached; the same being true for increasing the thickness of the silicon substrate. If having reduced thickness areas for the "hinge" on both sides of the diaphragm are desired, a SIMOX wafer having an intermediate, silicon dioxide layer on both the "bottom" and the "top" of the wafer is used, with each layer serving as an etch stop on its respective side, with the then exposed portions of the silicon dioxide layers thereafter being removed, leaving flanking, alternating, silicon "hinge" bridges (90a/90b; FIG. 5A-C).

Claims

1. A method of manufacturing a hinged diaphragm for a semiconductive sensor, comprising the following steps:

a) obtaining a wafer of single-crystal, semiconductive material having an internal insulating layer integrally formed within it as the starting material to ultimately produce the diaphragm;

b) selectively chemically etching away some of the semiconductive material of the wafer, producing a reduced thickness area at the location of the wafer to become the hinge in the diaphragm, using the insulating layer as an etch stop, until a portion of the insulating layer is exposed; and

c) removing the exposed portion of the insulating layer until the semiconductive material on the other side of the insulating layer is exposed, producing a hinge of single-crystal, semiconductive material.

2. The method of claim 1, wherein there is included the following steps:

producing a diaphragm made completely of single-crystal silicon and integrally forming said hinge by removing a portion of the silicon to form an indented trough in the silicon.

3. The method of claim 1, wherein there is included in step "c" the step of:

selectively chemically etching out the exposed portion hinge of the insulating layer using the semiconductive material on the other side of the insulating layer as an etch stop, using a different chemical etch than that used in step "b".

4. The method of claim 1, Wherein there is included in step "a" the steps:

using a SIMOX wafer as the starting material with doped silicon as the semiconductive material with an integral, intermediate, insulating layer of silicon dioxide between a relatively thin layer of doped silicon, which will provide the "hinge" and a relatively thick, substrate layer of doped silicon, which will provide the body of the diaphragm.

5. The method of claim 4, wherein there is included the following steps:

using an etchant from the group consisting of a plasma etch and high temperature, anhydrous hydrochloric acid (HCl), as the chemical etch in step "b".

6. The method of claim 4, wherein there is included in step "c" the following steps:

selectively chemically etching out the exposed portion of the insulating layer using the semiconductive material on the other side of the insulating layer as an etch stop, using a different chemical etch than that used in step "b"; and

using hydrofluoric (HF) acid as the chemical etch in step "c".

7. The method of claim 4, wherein there is included the further steps of:

increasing the thickness of at least the relatively thin layer of silicon by epitaxially growing silicon on it.

8. The method of claim 1, wherein there is included the following steps:

performing step "a" by obtaining a wafer of single-crystal, semiconductive material, having on its top side an internal insulating layer integrally formed within it and on its bottom side an internal insulating layer integrally formed within it, with the two insulating layers being separated by a central region of semiconductive material, as the starting material to ultimately produce the diaphragm;

performing step "b" by selectively chemically etching away some of the semiconductive material on both the top and bottom sides of the wafer, producing reduced thickness areas in both the top and bottom sides of the wafer at the locations of the wafer to become the hinge in the diaphragm, using the insulating layer on each side as an etch stop, until a portion of the respective insulating layer is exposed; and

performing step "c" by removing the exposed portion of the insulating layer on each side until the semiconductive material on the other side of the each insulating layer in the central region is exposed, producing a centrally located hinge of single-crystal, semiconductive material.

9. The method of claim 8, wherein there is included the following steps:

performing step "b" by selectively chemically etching away some of the semiconductive material on both the top and bottom sides of the wafer forming flanking, alternating, hinge portions, producing flanking, alternating, reduced thickness areas in both the top and bottom sides of the wafer at the locations of the wafer for the hinge for the diaphragm, using the insulating layer on each side as an etch stop, until a portion of the respective insulating layer is exposed.

10. A method of manufacturing a hinged diaphragm for a capacitive, semiconductive-dielectric-semiconductive sensor, which sensor will include

a conductive substrate of semiconductor material,

a conductive diaphragm of semiconductor material, the diaphragm having an inner, central region and an outer area, the diaphragm being capable of flexing movement in its central region due to the action of physical changes to be sensed, a "hinge" being formed at the outer, peripheral area of the diaphragm by including an area surrounding said central region of substantially less thickness than the thickness of the central region of said diaphragm, causing the central region of said diaphragm to remain planar as it moves relatively linearly up and down under the action of the physical changes as the hinge flexes, and

a non-conductive, dielectric layer between the semiconductive substrate and the semiconductive diaphragm, the dielectric layer providing peripheral wall(s) extending between and joining the semiconductive substrate and the semiconductive diaphragm;

an evacuated reference chamber being formed between the semiconductive substrate and the semiconductive diaphragm and being closed off by the peripheral wall(s) formed by the dielectric layer between the semiconductive substrate and the semiconductive diaphragm;

the flexing movement of the semiconductive diaphragm due to the physical changes, causing the capacitance of the sensor to vary;

comprising the following steps;

a) obtaining a SIMOX wafer of single-crystal, semiconductive, doped silicon material having an internal insulating layer of silicon dioxide integrally formed within it, between a relatively thin layer of doped silicon, which will provide the "hinge" and a relatively thick, substrate layer of doped silicon, which will provide the body of the diaphragm, as the starting material to ultimately produce said diaphragm;

b) selectively chemically etching away some of the semiconductive, silicon material of the wafer, producing a reduced thickness area in the location of the wafer to become the hinge in the diaphragm, using the silicon dioxide insulating layer as an etch stop, until a portion of the insulating layer is exposed; and

c) selectively chemically etching out the exposed portion of the insulating layer using the semiconductive, silicon material on the other side of the insulating layer as an etch stop, using a different chemical etch than that used in step "b", until the semiconductive, silicon material on the other side of the insulating layer is exposed, producing a hinge of single-crystal, semiconductive, silicon material.

11. The method of claim 10, wherein there is included the further steps of:

increasing the thickness of at least the relatively thin layer of silicon by epitaxially growing silicon on it.

12. The method of claim 10, wherein there is included the following steps:

performing step "a" by obtaining a wafer of single-crystal, semiconductive, silicon material, having on its top side an internal insulating layer of silicon dioxide integrally formed within it and on its bottom side an internal insulating layer of silicon dioxide integrally formed within it, with the two insulating layers being separated by a central region of semiconductive, silicon material, as the starting material to ultimately produce the diaphragm;

performing step "b" by selectively chemically etching away some of the semiconductive, silicon material on both the top and bottom sides of the wafer, producing reduced thickness areas in both the top and bottom sides of the wafer at the locations of the wafer to become the hinge in the diaphragm, using the silicon dioxide insulating layer on each side as an etch stop, until a portion of the respective silicon dioxide insulating layer is exposed; and

performing step "c" by removing the exposed portion of the silicon dioxide insulating layer on each side until the semiconductive, silicon material on the other side of the each insulating layer in the central region is exposed, producing a centrally located hinge of single-crystal, semiconductive, silicon material.

13. A method of making a hinged diaphragm for a capacitive, semiconductive-dialectric-semiconductive sensor, comprising the steps of:

manufacturing said diaphragm from a SIMOX wafer of single-crystal, semiconductive, doped silicon material having an integral insulating layer of silicon dioxide integrally formed within it;

wherein said SIMOX wafer includes a relatively thin layer of doped silicon and a relatively thick, substrate layer of doped silicon, and wherein there is included the further steps of

using the SIMOX wafer as the starting material and the intermediate, insulating layer of silicon dioxide to make the "hinge" and the relatively thick, substraet layer of doped silicon for the body of the diaphragm;

selectively chemically etching away some of the semiconductive, silicon material of the wafer, producing a reduced thickness area in the location of the wafer to ultimately become the hinge for the diaphragm using the silicon dioxide insulating layer as an etch stop, until a portion of the insulating layer is exposed.

14. The method of claim 13, wherein there is included the further steps of:

selectively chemically etching out the exposed portion of the insulating layer using the semiconductive, silicon material on the other side of the insulating layer as an etch stop, using a different chemical etch than that used in step "a", until the semiconductive, silicon material on the other side of the insulating layer is exposed, producing a hinge of single-crystal, semiconductive, silicon material.

15. A hinged diaphragm structure for a semiconductive sensor, comprising:

a wafer of single-crystal, semiconductive material having an upper, main surface and an upper, internal, insulating layer integrally formed within it from high energy ion bombardment through said main surface, said upper insulating layer being spaced down within the material away from but substantially parallel to said main surface; and

upper, reduced thickness areas going down through said main surface forming the hinge for the diaphragm, said reduced thickness areas having been created in the material of the wafer with a chemical, selective etchant using the insulating layer as an etch stop, exposing a portion of the insulating layer, with that exposed portion of the insulating layer thereafter removed to the semiconductive material on the other side of the insulating layer, an internal, side edge of said upper insulating layer being exposed in said reduced thickness areas.

16. The diaphragm structure of claim 15 having a proof mass, wherein:

said upper, reduced thickness areas form together a trough surrounding the proof mass of the diaphragm of the sensor.

17. The diaphragm structure of claim 15, wherein:

said wafer is a SIMOX wafer of silicon material, the bombarding ions having been oxygen ions, with said, insulating layer being silicon dioxide (SiO₂).

18. The diaphragm structure of claim 15, wherein:

said wafer also includes a lower surface substantially parallel to said upper, main surface and a second, internal, insulating layer integrally formed within it from ion bombardment through said lower surface, said lower insulating layer being spaced down within the material away from but substantially parallel to said lower surface; and

lower, reduced thickness areas going down through said lower surface forming with said reduced areas through said main surface the hinge for the diaphragm, said upper and said lower, reduced thickness areas having been created in the material of the wafer with a chemical, selective etchant using the upper and lower, insulating layers as etch stops, exposing a portion of said upper and lower, insulating layers, with those exposed portions of said insulating layers thereafter removed to the semiconductive material on the other side of the insulating layers, internal, side edges of said upper and lower, insulating layers being exposed in said upper and lower, reduced thickness areas.

19. The diaphragm structure of claim 18, wherein:

said upper and lower, reduced areas form flanking, alternating, hinge bridges from the periphery of said wafer to the central portion of said wafer.

20. The diaphragm structure of claim 15, wherein:

said upper insulated layer is about two tenths of a micron deep within the wafer and is about two tenths of a micron thick.