Method and device for synchronizing on an outside event the sampling of measuring signals through a digitizing assembly of the oversampling type

• US 5,245,647 A
• Filed: 09/17/1991
• Issued: 09/14/1993
• Est. Priority Date: 09/17/1990
• Status: Expired due to Term

• Current Assignee: Institut Francais Du Petrole
• Original Assignee: Institut Francais Du Petrole
• Inventors: Thierry, Gerard, Grouffal, Christian
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): OUELLETTE, SCOTT
• Application Number:
  US07/760,941
• Time in Patent Office: 728 Days
• Field of Search: 377/20, 377/54, 377/55, 375/106, 375/111, 341/155
• US Class Current: 377/20
• CPC Class Codes: G01R 13/32 Circuits for displaying non-recurrent functions such as transients; Circuits for triggering; Circuits for synchronisation; Circuits for time-base expansion
• CPC Class Codes: G01R 13/345 for displaying sampled signals by using digital processors by intermediate A.D. and D.A. convertors (control circuits for CRT indicators)
• CPC Class Codes: G01V 1/247 Digital recording of seismic data, e.g. in acquisition units or nodes

Abstract

A digitalization assembly of the over-sampling type includes an analog to digital converter (2) producing at a frequency F=kf small-format p samples and a digital filter (3) which, through the summation of a certain number n of over-samples, produces validated larger P-format samples at the frequency f, at instants fixed by a clock. In order to readjust the sampling instants in relation to an outside event which can occur at any time, a temporary memory store (5) is inserted between the converter (2) and the filter (3) and, according to the instant of arrival of this event, the appropriate samples to be sent towards the filter for their summation are selected.

Claims

1. A device for synchronizing sampling of measuring signals with a reference signal marking an outside event, said device comprising a digitizing assembly including an analog to digital converter of the over-sampling type, a clock for producing a synchronization signal, and a digital filter adapted for producing, from the measuring signals and with a fixed period which is a multiple of a sampling period, a series of validated samples, each validated sample resulting from summation of a determined number n of samples from the analog to digital converter;

and shifting means for forcing production, by the digital filter, of one series of validated samples, the first sample of said one series of validated samples corresponding to a sample taken on an input signal with a shift independent of the reference signal.

2. A device as claimed in claim 1, wherein said shifting means are adapted for forcing the production by said digital filter of said first validated sample, with a shift less than said fixed period.

3. A device as claimed in claims 1 or 2, wherein said shifting means for forcing production by the digital filter of the first validated sample comprise a memory for a number N of samples greater than the number n of samples to be summed by the digital filter to produce a validated sample, and a control assembly adapted, at the reception of said reference signal, for ordering selective extraction of n samples selected according to the time of reception of the reference signal and transferring thereof into said digital filter, whereby the first sample validated after the reference signal produced by the digital filter corresponds to a sample taken on the measuring signals with a shift less than a predetermined number of sampling periods.

4. A device as claimed in claim 3, wherein said control assembly is adapted for ordering the extraction of the n samples preceding the arrival of the reference signal and for transferring the same into said digital filter.

5. A device as claimed in claim 3, wherein said control assembly is adapted for ordering extraction of n samples distributed in time on either side of the instant of arrival of the reference signal.

6. A device as claimed in claim 3 wherein the memory is fitted with a writing pointer and a reading pointer, and the control assembly comprises a counter for storing the number of sampling periods in a time interval and at the most equal to one of said fixed periods, making it possible to localize the time of arrival of said reference signal, and means for shifting said pointers in relation to one another according to the number stored by said counter, in order to select the samples constituting the first sample validated after the reference signal.

7. A device as claimed in claim 3 wherein the memory is of the F.I.F.O. revolving type, designed for working with a delay line, the delay applied to the samples transmitted to said digital filter being less than the time required for sampling of the N samples in the memory.

8. A method for synchronizing, with a common reference signal marking an outside event, sampling of measuring signals respectively by a plurality of signal digitizing assemblies, each assembly comprising an analog to digital converter of the over-sampling type, a clock producing synchronization signals, and a digital filter adapted for producing from the measuring signals and with a fixed period a series of validated samples resulting from summation of a sequence of n successive samples coming from the analog to digital converter and obtained by over-sampling, said method comprising:

storing a determined number N of samples greater than a number n of each sequence of samples coming from each one of said analog to digital converters before being applied to the corresponding digital filter, and

selecting among permanently stored N samples of each measuring signal a time shifted sequence of n successive samples, so that a corresponding validated sample coming from each digital filter corresponds to a sample taken on each signal with a shift independent of the reference signal and substantially the same for all the digitizing assemblies.

9. A method as claimed in claim 8 wherein the time shift applied for selecting each sequence is obtained by measuring the time separating the validated samples from the reference signal.

10. An analog-to-digital converting system comprising:

at least one digitizing assembly including an over-sampling converter means for producing from analog signals to be converted a series of low resolution digital signals;

clock means for generating an over-sampling clock signal; and

a digital filter means for summing up a determined number of said low resolution digital signals, said digital filter means producing in succession from said series higher resolution digital words with a fixed period which is a multiple of the period of the over-sampling clock signals; and

means for synchronizing with a reference signal marking occurrence of an outside event, production of validated digital words by said digital filter means, said synchronizing means comprising shifting means for forcing production by said digital filter means of validated digital words, a first produced validated digital word corresponding to a sample picked up on the analog signals with a shift independent of said reference signal.

11. An analog-to-digital converting system comprising:

a digitizing assembly including an over-sampling converter means for producing from analog signals to be converted a series of low resolution digital signals;

clock means for generating an over-sampling clock signal; and

a digital filter means for summing up a determined number of said low resolution digital signals, said digital filter means producing in succession from said series higher resolution digital words with a fixed period which is a multiple of the period of the over-sampling clock signals; and

means for synchronizing with a reference signal, marking occurrence of an outside event, production of validated digital words by said digital filter means, said synchronizing means comprising shifting means for forcing production by said digital filter means of validated digital words, a first produced validated digital word corresponding to a sample picked up on the analog signals with a shift less than the fixed period.

12. An analog-to-digital converting system comprising:

at least one digitizing assembly including an over-sampling converter means for producing from analog signals to be converted a series of low resolution digital signals;

clock means for generating an over-sampling clock signal; and

a digital filter means for summing up a determined number of said low resolution digital signals, said digital filter means producing in succession from said series higher resolution digital words with a fixed period which is a multiple of the period of the over-sampling clock signals; and

means for synchronizing with a reference signal, marking occurrence of an outside event, production of validated digital words by said digital filter means, said synchronizing means comprising shifting means for forcing production by said digital filter means of validated digital words, said shifting means including a memory means for a number N of low resolution digital signals greater than a number n of low resolution digital signals to be received and summed by said digital filter means to produce a digital word, and a control assembly for controlling at reception of said reference signal, selective extraction of said low resolution digital signals selected according to the time of reception and transfer thereof into said digital filter means, whereby a first produced validated digital word validated after said reception time corresponds to a sample picked up on said analog signals with a shift less than a predetermined number of periods of said over-sampling clock signal.

13. A converting system as claimed in claim 12, wherein said control assembly is adapted for controlling selective transfer of n low resolution digital signals preceding said reception time into said digital filter.

14. A converting system as claimed in claim 12, wherein said control assembly is adapted for controlling selective transfer of n low resolution digital signals distributed in time on either side of said reception time.

15. A converting system as claimed in claims 12, 13, or 14, wherein said memory means is provided with a writing pointer and a reading pointer, said control assembly comprises counter means for storing said number of n low resolution digital signals in a time interval and at the most equal to one of said fixed periods, thereby allowing localizing said reception time, and means for shifting said writing and reading pointers in relation to each other according to said number of n stored low resolution digital signals by said counter means, so as to select the low resolution digital words forming said first digital word validated after the reference signal.

16. A converting system as claimed in 12, wherein said memory means comprises a F.I.F.O. type memory and a delay line for applying to low resolution digital words transmitted to said digital filter means a delay at most equal to the time for sampling said N low resolution digital words.

17. A method of synchronizing with a common reference signal marking an outside event production from analog signals of validated digital words by a plurality of signal digitizing assemblies, each assembly including an over-sampling converter means for producing from analog signals to be converted a series of low resolution digital signals, clock means for generating an over-sampling clock signal, and a digital filter means for summing up a determined number n of said low resolution digital signals, said digital filter means producing in succession from said series higher resolution digital words with a fixed period which is a multiple of the period of the over-sampling clock signals, said method comprising:

storing a determined current number N of low resolution digital signals greater than said determined number n of low resolution digital signals from each one of said over-sampling converter means before being applied to the associated digital filter means;

selecting among the N current low resolution digital signals stored for each analog signal a time shifted sequence of n of said digital signals, so that the resulting validated digital word issuing from each digital filter means corresponds to a sample picked up on each analog signal with a shift independent of the time of arrival of said reference signal and substantially the same for all the digitizing assemblies.

18. A method as claimed in claim 17, wherein the time shift applied for selecting each sequence is obtained by measuring a time interval between instants of production of said validated digital words from said time of arrival.