Dual DC/DC voltage converter power system

• US 5,247,239 A
• Filed: 08/12/1992
• Issued: 09/21/1993
• Est. Priority Date: 08/22/1991
• Status: Expired due to Fees

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Okada, Kotaro, Yamamura, Norihisa, Hibino, Kazunori
• Primary Examiner(s): Sterrett, J. L.
• Application Number:
  US07/930,092
• Time in Patent Office: 405 Days
• Field of Search: 323/222, 323/272, 323/282, 323/284, 323/288, 363/65
• US Class Current: 323/272
• CPC Class Codes: H02M 3/10 using discharge tubes with control electrode or semiconductor devices with control electrode H02M3/07 takes precedence
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel

Abstract

A voltage converter for stably converting, even a low input voltage, to a predetermined output level is provided. The output of cell 20 is increased by first and second step-up circuits 21 and 22, and then smoothed by smoothing circuit 31. The output is converted by the first step-up circuit from the start of voltage conversion until a predetermined output voltage, and then converted by the second step-up converter thereafter. The output voltage of smoothing circuit 31 is compared against a first reference voltage by first comparator circuit 35, the output of which activates the integral circuit in second comparator circuit 37. The charge voltage of the integral circuit is compared to a sawtooth wave STW generated by oscillator circuit 43 to derive a signal for forcefully shutting down MOS transistor 29 in the second step-up circuit. On the other hand, a error voltage between the output of smoothing circuit 31 and a second reference voltage is amplified, followed by comparison with the sawtooth wave, and the resulting output is combined with the output of the second comparator circuit to control the pulse width of MOS transistor 29 for a desired output voltage.

Claims

1. A voltage converter comprising:

a cell;

an oscillator means for generating a repetitive signal of a predetermined frequency;

a sawtooth-wave generator responsive to the repetitive signal from said oscillator means to derive a sawtooth wave;

a first step-up means coupled to the output of said cell and to said oscillator means to activate and deactivate a switching means coupled to said oscillator means, thereby increasing the output voltage of said cell;

a second step-up means coupled to the output of said cell and to a pulse width control signal to activate and deactivate a switching means in accordance with said pulse width control signal, thereby increasing the output voltage of said cell;

a smoothing means for smoothing an output voltage, said output voltage being a combination of the output of said first step-up means and the output of said second step-up means;

a first comparator means for providing a stop pulse for stopping the operation of said first step-up means when the output voltage of said smoothing means has reached a predetermined first reference voltage;

a second comparator means responsive to said stop pulse to start charging, said comparator means comparing the magnitudes between the voltage of said sawtooth wave and said charge voltage to provide a forced shut-down pulse for shutting down said switching means in said second step-up means; and

a pulse width control means for comparing the magnitudes between a voltage proportional to a voltage differential and the voltage of said sawtooth wave, said voltage differential between a voltage proportional to the output voltage of said smoothing means and a predetermined second reference voltage,

said pulse width control means providing said pulse width control signal containing said forced shut-down pulse at least for a period during which said forced shut-down pulse exists.

2. The voltage converter according to claim 1 wherein:

said first step-up means comprises a MOS transistor having a source connected to ground, a drain, and a gate, and a coil having one terminal coupled to the output of said cell and the other terminal coupled to an anode of a diode and to the drain of said MOS transistor; and

said second step-up means comprises a power MOS transistor having a source connected to ground, a drain, and a gate, and a coil having one terminal coupled to the output of said cell and the other terminal coupled to an anode of a diode and to the drain of said power MOS transistor.

3. The voltage converter according to claim 1 further comprising:

an output switching means provided between the output of said smoothing circuit and an external output terminal; and

a delay means for delaying said stop pulse by a predetermined time;

wherein said output switching means is activated in response to the output of said delay means.

4. The voltage converter according to claim 1 further comprising:

an output switching means provided between the output of said smoothing circuit and the external output terminal; and

a third comparator means for comparing said charge voltage against a predetermined reference voltage;

wherein said output switching means is activated in response to the output of said third comparator means.