Active matrix panel having display and driver TFT's on the same substrate

• US 5,250,931 A
• Filed: 05/15/1989
• Issued: 10/05/1993
• Est. Priority Date: 05/17/1988
• Status: Expired due to Term

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Oshima, Hiroyuki, Misawa, Toshiyuki
• Primary Examiner(s): HJERPE, RICHARD A
• Application Number:
  US07/351,758
• Time in Patent Office: 1,604 Days
• Field of Search: 340/718, 340/719, 340/784, 340/716, 350/332, 350/333, 359/59
• US Class Current: 345/206
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136254 Checking; Testing
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2330/12 Test circuits or failure detection circuits included in a display system, as permanent part thereof
• CPC Class Codes: G09G 3/001 using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background slide projectors per se G03B23/00 = 42 HP
• CPC Class Codes: G09G 3/002 to project the image of a two-dimensional display, such as an array of light emitting or modulating elements or a CRT
• CPC Class Codes: G09G 3/003 to produce spatial visual effects
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/2011 by amplitude modulation
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3659 the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/8592 Applying permanent coating, e.g. protective coating
• CPC Class Codes: H01L 23/4825 for devices consisting of semiconductor layers on insulating or semi-insulating substrates, e.g. silicon on sapphire devices, i.e. SOS
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/78618 : characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/12032 : Schottky diode
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: Y10S 257/923 : with means to optimize electrical conductor current carrying capacity, e.g. particular conductor aspect ratio
• CPC Class Codes: Y10S 345/904 : Display with fail/safe testing feature

Abstract

An active matrix panel including a matrix of driving electrodes couples through thin film transistor switches to a corresponding source line and gate line and at least one of a driver circuit including complementary thin film transistors for driving the source and/or gate lines of the picture elements on the substrate. The thin film transistors of the active matrix have the same cross-sectional structure as the P-type or the N-type thin film transistors forming the driver circuit and are formed during the same patterning process.

Claims

1. An active matrix device, comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines;

a plurality of substantially parallel gate lines crossing the plurality of substantially parallel source lines forming a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor; and

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration having a dimension different from the corresponding dimension of the thin film transistors of the display region to provide a desired operating condition for a driving means for an active matrix device;

wherein the matrix of thin film transistors formed in the display region have essentially the same cross-sectional structure as the thin film transistors of the driving means shift register.

2. The active matrix device of claim 1, wherein the display region thin film transistors and driving means thin film transistors are silicon thin film transistors.

3. The active matrix device of claim 1, wherein the driving means includes a source line driver circuit and a gate line driver circuit formed on the substrate.

4. The active matrix device of claim 3, wherein the source line driver circuit includes a plurality of unit cells and further including a video signal bus terminal and test circuits having test signal output terminals for source and gate signals, one of the test circuits being coupled to the video signal bus terminal and between outputs of each unit cell of the source line driver circuit and the test signal output terminal for providing a test signal.

5. The active matrix device of claim 1, wherein the display region thin film transistors and driving means thin film transistors each include source and drain regions, the source and drain regions being implanted with impurities and wherein one of the source and drain regions of each thin film transistor is of one of conductivity type and includes both acceptor and donor impurities.

6. The active matrix device of claim 1, wherein the driving means thin film transistors include P-type and N-type thin film transistors, said P-type thin film transistors including acceptor impurities in the source and drain regions thereof, said N-type thin film transistors including acceptor impurities and donor impurities in the source and drain regions thereof, the donor impurities being at a higher concentration than the acceptor impurities in said source and drain regions of said N-type thin film transistors.

7. The active matrix device of claim 1, wherein the driving means thin film transistors include P-type and N-type thin film transistors, said N-type thin film transistors including donor impurities in the source and drain regions thereof, said P-type thin film transistors including donor impurities and acceptor impurities in the source and drain regions thereof, the acceptor impurities being at a higher concentration than the donor impurities in said source and drain regions of said P-type thin film transistors.

8. The active matrix device of claim 1, wherein the driving means further includes a source line driver circuit, said source line driver circuit including said shift register and a plurality of additional shift registers, said shift register and additional shift registers being driven by separate clocks which are out of phase with each other, said driving means further including a video bus, and a sample and hold circuit coupled to the video bus and to the shift register, each of the additional shift registers and each source line.

9. The active matrix device of claim 1, further including a metal oxide semiconductor capacitor coupled to one of the display region thin film transistors and the associated driving electrode, the metal oxide semiconductor capacitor having essentially the same cross-sectional structure as said one display region thin film transistor.

10. The active matrix device of claim 9, wherein the metal oxide semiconductor capacitor includes gate means for applying a voltage potential to the capacitor of a polarity opposite to the conductivity type of said one thin film transistor.

11. The active matrix device of claim 1, wherein said driving means further includes sample and hold means responsive to the shift register for temporarily storing video data.

12. The active matrix device of claim 11, further including a plurality of video lines and corresponding plurality of sample and hold lines, each video line being connected to said sample and hold means by one of said sample and hold lines and wherein all sample and hold lines have approximately the same resistance.

13. The active matrix device of claim 1, wherein said driving means further includes at least two clock lines connected to the shift register and wherein one of said clock lines crosses over at least one other clock line.

14. The active matrix device of claim 13, wherein each of the clock lines crosses over each of the other clock lines.

15. The active matrix device of claim 1, wherein the driving means includes a plurality of video signal lines coupled to the matrix of thin film transistors formed in the display region and wherein the display region thin film transistors and the shift register thin film transistors each include a gate, the plurality of video signal lines, display region thin film transistor gates and shift register thin film transistor gates being formed from the same material.

16. The active matrix device of claim 15, wherein the material is polycrystalline silicon.

17. The active matrix device of claim 1, wherein said driving means further includes a thin silicon film disposed on said substrate on which said shift register thin film transistors are formed.

18. The active matrix of claim 17, wherein said shift register thin film transistors include P-type and N-type thin film transistors.

19. The active matrix device of claim 1, further including capacitance means coupled to the display region thin film transistors for storage of video data.

20. The active matrix device of claim 19, wherein the capacitance means include a plurality of capacitors, each capacitor associated with one of the display region thin film transistors.

21. The active matrix device of claim 20, wherein each capacitor is of the MOS type.

22. The active matrix device of claim 20, wherein each capacitor has the same cross-sectional structure as one of the display region thin film transistors.

23. The active matrix device of claim 21, wherein each capacitor has the same cross-sectional structure as one of the display region thin film transistors.

24. An active matrix device, comprising:

a substrate;

`an active display region including a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate, a matrix of driving electrodes being disposed substantially at the source line-gate line intersections and at least one thin film transistor connected to each source line-gate line intersection;

each active display region transistor coupling the driving electrode associated with the active display region transistor to a source line of the active display region transistor;

the active display region being centrally positioned on the substrate; and

at least one driving means including a shift register having thin film transistors in a CMOS configuration, each driving means for driving one of the source lines and gate lines and disposed on the substrate outside of the active display region, said thin film transistors of said at least one driving means formed in said CMOS configuration having a dimension different from the corresponding dimension of the thin film transistors of the display region to provide a desired operating condition for a driving means for an active matrix device;

wherein the thin film transistors of the active display region and driving means shift register have essentially the same cross-sectional structure.

25. The active matrix device of claim 24, wherein said substrate is substantially rectangular and the active display region is centrally located within the substrate, said driving means including a source line driver circuit disposed on one side of the rectangular substrate and electrically coupled to the source lines of the active display region, a gate line driver circuit disposed on another side of the rectangular substrate, adjacent to the source line driver circuit and electrically coupled to the gate lines of the active display region and input terminals disposed substantially at corners of the rectangular substrate.

26. The active matrix device of claim 25, wherein the source line driver circuit includes said shift register and a sample and hold circuit disposed between said shift register and the display region and wherein the gate line driver circuit further includes an additional shift register and a buffer circuit disposed between the additional shift register and the display region.

27. The active matrix device of claim 26, further including a video signal bus disposed between the shift register and active display region.

28. The active matrix device of claim 27, further including connecting lines coupling the video signal bus to the source lines in the display region, said connecting lines being formed and arranged to make the effective resistances of each connecting line substantially equal to each other.

29. The active matrix device of claim 26, further including video lines connected to the driving means and at least a pair of clock lines for driving the shift register, the clock lines being twisted to reduce stray capacitance formed between the video lines and the clock lines.

30. The active matrix device of claim 24, wherein the driving means includes a plurality of adjacent unit cells, the unit cells having a pitch substantially equivalent to the pitch of the driving electrodes in the display region.

31. The active matrix device of claim 30, wherein each unit cell in the driving means includes thin film transistors in a CMOS configuration.

32. The active matrix device of claim 31, wherein the driving means thin film transistors include P-type and N-type thin film transistors and wherein each unit cell is electrically isolated from each other unit cell with a silicon thin film disposed as an island overlapping two adjacent cells to form one of the N-type and P-type thin film transistors and with silicon thin film disposed in the form of islands overlapping two other unit cells to form the other of the N-type and P-type thin film transistor in a staggered arrangement.

33. The active matrix device of claim 24, wherein said driving means further includes sample and hold means responsive to the shift register for temporarily storing video data.

34. The active matrix device of claim 24, wherein said driving means further includes at least two clock lines connected to the shift register and wherein one of said clock lines crosses over at least one other clock line.

35. The active matrix device of claim 34, wherein each of the clock lines crosses over each of the other clock lines.

36. The active matrix device of claim 24, further including sample and hold means responsive to the shift register for temporarily storing video data, a plurality of video lines for supplying said video data to the sample and hold means and a corresponding plurality of sample and hold lines, each video line being connected to said sample and hold means by one of said sample and hold lines and wherein all sample and hold lines have approximately the same resistance.

37. The active matrix device of claim 24, wherein the driving means includes a plurality of video signal lines coupled to the matrix of thin film transistors formed in the display region and wherein the display region thin film transistors and the shift register thin film transistors each include a gate, the plurality of video signal lines, display region thin film transistors gates and shift register thin film transistor gates being formed from the same material.

38. The active matrix device of claim 37, wherein the material is polycrystalline silicon.

39. The active matrix device of claim 24, wherein said driving means further includes a thin silicon film disposed on said substrate on which said shift register thin film transistors are formed.

40. The active matrix of claim 39, wherein said shift register thin film transistors include P-type and N-type thin film transistors.

41. The active matrix device of claim 24, further including capacitance means coupled to the display region thin film transistors for storage of video data.

42. The active matrix device of claim 41, wherein the capacitance means include a plurality of capacitors, each capacitor associated with one of the display region thin film transistors.

43. The active matrix device of claim 42, wherein each capacitor is of the MOS type.

44. The active matrix device of claim 42, wherein each capacitor has the same cross-sectional structure as one of the display region thin film transistors.

45. The active matrix device of claim 43, wherein each capacitor has the same cross-sectional structure as the display region thin film transistors.

46. An active matrix liquid crystal display panel, comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor;

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration having a dimension different from the corresponding dimension of the thin film transistors of the display region to provide a desired operating condition for a driving means for an active matrix liquid crystal display panel;

the matrix of thin film transistors formed in the display region having the same cross-sectional structure as the thin film transistors of the driving means shift register;

the substrate having a substantially rectangular shape with the display region centrally positioned on the substrate and with the driving means disposed along one side of the substrate;

an opposed substrate having at least one common electrode disposed thereon and spaced apart from the substrate; and

a liquid crystal material disposed in the space between the substrate and opposed substrate.

47. The active matrix liquid crystal display panel of claim 46, wherein the display region thin film transistors and driving means thin film transistors each include a silicon thin film island formed on the substrate, a gate insulating film formed on the silicon thin film, a gate electrode on the gate insulating film with the silicon thin film islands having impurities implanted to form a source region and a drain region;

and an additional insulating film formed over the gate electrode.

48. The active matrix liquid crystal display panel of claim 47, further including a plurality of metal oxide semiconductor capacitors, each capacitor formed adjacent and electrically coupled to one of the display region thin film transistors and also electrically coupled to one of the driving electrodes, each capacitor having the same cross-sectional structure as one of the display region thin film transistors.

49. A mounting structure for the active matrix liquid crystal display panel of claim 47, comprising a substantially planar base formed with a step opening therethrough for receiving the liquid crystal display device, the opening adapted to provide a shield about the periphery of the liquid crystal display device and permit substantially full exposure of the display portion of the display panel.

50. The active matrix liquid crystal display panel of claim 46, wherein certain thin film transistors of the driving means have impurities of a first conductivity type and wherein the remaining thin film transistors of the driving means and all thin film transistors of the display region have impurities of the first conductivity type and of a second conductivity type, the concentration of the second conductivity type impurity being greater than the concentration of the first conductivity type impurity.

51. The active matrix liquid crystal display panel of claim 46, wherein said driving means further includes sample and hold means responsive to the shift register for temporarily storing video data.

52. The active matrix liquid crystal display panel of claim 46, wherein said driving means further includes at least two clock lines connected to the shift register and wherein one of said clock lines crosses over at least one other clock line.

53. The active matrix liquid crystal display panel of claim 52, wherein each of the clock lines crosses over each of the other clock lines.

54. The active matrix liquid crystal display panel of claim 46, further including sample and hold means responsive to the shift register for temporarily storing video data, a plurality of video lines for supplying said video data to the sample and hold means and a corresponding plurality of sample and hold lines, each video line being connected to said sample and hold means by one of said sample and hold lines and wherein all sample and hold lines have approximately the same resistance.

55. The active matrix liquid crystal display panel of claim 46, wherein the driving means includes a plurality of video signal lines coupled to the matrix of thin film transistors formed in the display region and wherein the display region thin film transistors and the shift register thin film transistors each include a gate, the plurality of video signal lines, display region thin film transistor gates and shift register thin film transistor gates being formed from the same material.

56. The active matrix liquid crystal display panel of claim 55, wherein the material is polycrystalline silicon.

57. The active matrix liquid crystal display panel of claim 46, wherein said driving means further includes a thin silicon film disposed on said substrate on which said shift register thin film transistors are formed.

58. The active matrix liquid crystal display panel of claim 57, wherein said shift register thin film transistors include P-type and N-type thin film transistors.

59. The active matrix liquid crystal display panel of claim 46, further including capacitance means coupled to the displayed region thin film transistors for storage of video data.

60. The active matrix liquid crystal display panel of claim 59, wherein the capacitance means include a plurality of capacitors, each capacitor associated with one of the display region thin film transistors.

61. The active matrix liquid crystal display panel of claim 60, wherein each capacitor is of the MOS type.

62. The active matrix liquid crystal display panel of claim 60, wherein each capacitor has the same cross-sectional structure as one of the display region thin film transistors.

63. The active matrix liquid crystal display panel of claim 61, wherein each capacitor has the same cross-sectional structure as one of the display region thin film transistors.

64. In a projection type color display device having a light source for projecting light toward a blue dichroic mirror, a green dichroic mirror and a red dichroic mirror for reflecting components of light for modulation by a blue liquid crystal light valve, a green liquid crystal light valve and a red liquid crystal light valve, respectively, the modulated components of light passing through a dichroic prism system for projecting a synthesized color image, each light valve comprising:

a substrate;

an active matrix display region formed on the substrate, the display region including a plurality of substantially parallel source lines crossing a plurality of source substantially parallel gate lines to form a plurality of line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor being connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor;

driving means formed on the substrate adjacent to the display region or driving at least one of the source lines and gate lines and including a shift register with thin film transistors in a CMOS configuration, the thin film transistors of the driving means in a CMOS configuration having a dimension different from the corresponding dimension of the thin film transistors of the display region to provide a desired operating condition for a liquid crystal light valve, the matrix of thin film transistors in the display region having the same cross-sectional structure as the thin film transistors of the driving means shift register.

65. The projection type color display device of claim 64, wherein said driving means further includes sample and hold means responsive to the shift register for temporarily storing video data.

66. The projection type color display device of claim 64, wherein said driving means further includes at least two clock lines connected to the shift register and wherein one of said clock lines crosses over at least one other clock line.

67. The projection type color display device of claim 66, wherein each of the clock lines crosses over each of the other clock lines.

68. The projection type color display device of claim 64, further including sample and hold means responsive to the shift register for temporarily storing video data, a plurality of video lines for supplying said video data to the sample and hold means and a corresponding plurality of sample and hold lines, each video line being connected to said sample and hold means by one of said sample and hold lines and wherein all sample and hold lines have approximately the same resistance.

69. The projection type color display device of claim 64, wherein the driving means includes a plurality of video signal lines coupled to the matrix of thin film transistors formed in the display region and wherein the display region thin film transistors and the shift register thin film transistors each include a gate, the plurality of video signal lines, display region thin film transistor gates and shift register thin film transistor gates being formed from the same material.

70. The projection type color display device of claim 69, wherein the material is polycrystalline silicon.

71. The projection type color display device of claim 64, wherein said driving means further includes a thin silicon film disposed on said substrate on which said shift register thin film transistors are formed.

72. The projection type color display device of claim 71, wherein said shift register thin film transistors include P-type and N-type thin film transistors.

73. The projection type color display device of claim 64, further including capacitance means coupled to the display region thin film transistors for storage of video data.

74. The projection type color display device of claim 73, wherein the capacitance means include a plurality of capacitors, each capacitor associated with one of the display region thin film transistors.

75. The projection type color display device of claim 74, wherein each capacitor is of the MOS type.

76. The projection type color display device of claim 74, wherein each capacitor has the same cross-sectional structure as one of the display region thin film transistors.

77. The projection type color display device of claim 75, wherein each capacitor has the same cross-sectional structure as one of the display region thin film transistors.

78. An active matrix device, comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines;

a plurality of substantially parallel gate lines crossing the plurality of substantially parallel source lines forming a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor; and

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration being dimensioned to provide a desired operating condition for a driving means for an active matrix device, the resistance when turned ON of at least one shift register thin film transistor in the CMOS configuration being less than the resistance when turned ON of at least one thin film transistor formed in the display region.

79. The active matrix device of claim 78, wherein the resistance when turned ON of each shift register thin film transistor in the CMOS configuration is less than the resistance when turned ON of each thin film transistor formed in the display region.

80. The active matrix device of claim 78, wherein at least two of the shift register thin film transistors in the CMOS configuration serve as an inverter.

81. The active matrix device of claim 79, wherein the shift register includes a plurality of inverters, each inverter represented by at least two of the shift register thin film transistors in the CMOS configuration.

82. The active matrix device of claim 78, wherein the at least one shift register thin film transistor in the CMOS configuration and the at least one thin film transistor formed in the display region each include a gate, the gate length of the at least one shift register thin film transistor in the CMOS configuration being less than the gate length of the at least one thin film transistor formed in the display region.

83. An active matrix device, comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines;

a plurality of substantially parallel gate lines crossing the plurality of substantially parallel source lines forming a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor; and

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration having a dimension different from the corresponding dimension of the thin film transistors of the display region to provide a desired operating condition for a driving means for an active matrix device, the thin film transistors of the shift register including at least one P-type thin film transistor having first carrier mobility and at least one N-type thin film transistor having second carrier mobility, the first carrier mobility and second carrier mobility being of the same order of magnitude whereby the first carrier mobility and second carrier mobility vary from each other by no greater than a factor of approximately 10.

84. The active matrix device of claim 83, wherein each P-type thin film transistor and each N-type thin film transistor have a source region, a drain region and a separating region for selecting the source region from the drain region;

the source, drain and separating regions of each P-type thin film transistor and each N-type thin film transistor being formed from a thin silicon film.

85. The active matrix device of claim 84, wherein the thin silicon film includes polycrystalline silicon.

86. The active matrix device of claim 83, wherein each P-type thin film transistor includes a gate length L_P and each N-type thin film transistor includes a gate length L_N, L_P being less than L_N.

87. The active matrix device of claim 85, wherein each P-type thin film transistor includes a gate length L_P and each N-type thin film transistor includes a gate length L_N, L_P being less than L_N.

88. An active matrix device comprising:

a substrate;

an active display region including a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate, a matrix of driving electrodes being disposed substantially at the source line-gate line intersections and at least one thin film transistor connected to each source line-gate line intersection;

each active display region transistor coupling the driving electrode associated with the active display region transistor to a source line of the active display region transistor;

the active display region being centrally positioned on the substrate; and

at least one driving means including a shift register having thin film transistors in a CMOS configuration, each driving means for driving one of the source lines and gate lines and disposed on the substrate outside of the active display region, said thin film transistors of said at least one driving means formed in said CMOS configuration having a dimension different from the corresponding dimension of the thin film transistors of the display region to provide a desired operating condition for a driving means for an active matrix device, the thin film transistors of the shift register including at least one P-type thin film transistor having first carrier mobility an at least one N-type thin film transistor having second carrier mobility, the first carrier mobility and second carrier mobility being of the same order of magnitude whereby the first carrier mobility and second carrier mobility vary from each other by no greater than a factor of approximately 10.

89. The active matrix device of claim 88, wherein each P-type thin film transistor and each N-type thin film transistor have a source region, a drain region and a separating region for separating the source region from the drain region;

the source, drain and separating regions of each P-type thin film transistor and each N-type thin film transistor being formed from a thin silicon film.

90. The active matrix device of claim 89, wherein the thin silicon film includes polycrystalline silicon.

91. The active matrix device of claim 88, wherein each P-type thin film transistor includes a gate length L_P and each N-type thin film transistor includes a gate length L_N, L_P being less than L_N.

92. The active matrix device of claim 89, wherein each P-type thin film transistor includes a gate length L_P and each N-type thin film transistor includes a gate length L_N, L_P being less than L_N.

93. An active matrix liquid crystal display panel, comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor;

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration having a dimension different from the corresponding dimension of the thin film transistors of the display region to provide a desired operating condition for a driving means for an active matrix liquid crystal display panel, the thin film transistors of the shift register including at least one P-type thin film transistor having first carrier mobility and at least one N-type thin film transistor having second carrier mobility, the first carrier mobility and second carrier mobility being of the same order of magnitude whereby the first carrier mobility and second carrier mobility vary from each other by no greater than a factor of approximately 10;

the substrate having a substantially rectangular shape with the display region centrally positioned on the substrate and with the driving means disposed along one side of the substrate;

an opposed substrate having at least one common electrode disposed thereon and spaced apart from the substrate; and

a liquid crystal material disposed in the space between the substrate and opposed substrate.

94. The active matrix liquid crystal display panel of claim 93, wherein each P-type thin film transistor and each N-type thin film transistor each have a source region, a drain region and a separating region for separating the source region from the drain region;

the source, drain and separating regions of each P-type thin film transistor and each N-type thin film transistor being formed from a thin silicon film.

95. The active matrix liquid crystal display panel of claim 94, wherein the thin silicon film includes polycrystalline silicon.

96. The active matrix liquid crystal display panel of claim 93, wherein each P-type thin film transistor includes a gate length L_p and each N-type thin film transistor includes a gate length L_N, L_P being less than L_N.

97. The active matrix liquid crystal display panel of claim 95, wherein each P-type thin film transistor includes a gate length L_P and each N-type thin film transistor includes a gate length L_N, L_P being less than L_N.

98. In a projection type color display device having a light source for projecting light toward a blue dichroic mirror, a green dichroic mirror and a red dichroic mirror for reflecting components of light for modulation by a blue liquid crystal light valve, a green liquid crystal light valve and a red liquid crystal light valve, respectively, the modulated components of light passing through a dichroic prism system for projecting a synthesized color image, each light valve comprising:

a substrate;

an active matrix display region formed on the substrate, the display region including a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor being connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor;

driving means formed on the substrate adjacent to the display region for driving at least one of the source lines and gate lines and including a shift register with thin film transistors in a CMOS configuration, the thin film transistors of the driving means in a CMOS configuration having a dimension different from the corresponding dimension of the thin film transistors of the display region to provide a desired operating condition for said liquid crystal light valve, the thin film transistors of the static shift register including at least one P-type thin film transistor having first carrier mobility and at least one N-type thin film transistor having second carrier mobility, the first carrier mobility and second carrier mobility being of the same order of magnitude whereby the first carrier mobility and second carrier mobility vary from each other by no greater than a factor of approximately 10.

99. The projection type color display device of claim 98, wherein each P-type thin film transistor and each N-type thin film transistor have a source region, a drain region and a separating region for selecting the source region from the drain region;

the source, drain and separating regions of each P-type thin film transistor and each N-type thin film transistor being formed from a thin silicon film.

100. The projection type color display device of claim 99, wherein the thin silicon film includes polycrystalline silicon.

101. The projection type color display device of claim 98, wherein each P-type thin film transistor includes a gate length L_P and each N-type thin film transistor includes a gate length L_N, L_P being less than L_N.

102. The projection type color display device of claim 100, wherein each P-type thin film transistor includes a gate length L_P and each N-type thin film transistor includes a gate length L_N, L_P being less than L_N.

103. An active matrix device, comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines;

a plurality of substantially parallel gate lines crossing the plurality of substantially parallel source lines forming a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor; and

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration being dimensioned to provide a desired operating condition for a driving means for an active matrix device, the shift register thin film transistors in the CMOS configuration and the thin film transistors formed in the display region each including a gate, the gate length of at least one shift register thin film transistor in the CMOS configuration being less than the gate length of at least one thin film transistor formed in the display region.

104. The active matrix device of claim 103, wherein said driving means further includes sample and hold means responsive to this shift register for temporarily storing video data.

105. The active matrix device of claim 104, wherein the sample and hold means includes a plurality thin film transistors, each thin film transistor of the sample and hold means having a gate, the gate length of each thin film transistor in the sample and hold means being less than the gate length of each thin film transistor in the shift register.

106. An active matrix device comprising:

a substrate;

an active display region including a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate, a matrix of driving electrodes being disposed substantially at the source line-gate line intersections and at least one thin film transistor connected to each source line-gate line intersection;

each active display region transistor coupling the driving electrode associated with the active display region transistor to a source line of the active display region transistor;

the active display region being centrally positioned on the substrate; and

`at least one driving means including a shift register having thin film transistors in a CMOS configuration, each driving means for driving one of the source lines and gate lines and disposed on the substrate outside of the active display region, said thin film transistors of said at least one driving means formed in said CMOS configuration being dimensioned to provide a desired operating condition for said driving means for an active matrix device, said driving means further including sample and hold means responsive to the shift register for temporarily storing video data, the sample and hold means including a plurality of thin film transistors, the thin film transistors of the sample and hold means and of the driving means shift register each having a gate, the gate length of each thin film transistor in the sample and hold means being less than the gate length of each thin film transistor of the driving means shift register.

107. An active matrix device, comprising

a substrate;

an active display region including a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate, a matrix of driving electrodes being disposed substantially at the source line-gate line intersections and at least one thin film transistor connected to each source line-gate line intersection;

each active display region transistor coupling the driving electrode associated with the active display region transistor to a source line of the active display region transistor;

the active display region being centrally positioned on the substrate; and

at least one driving means including a shift register having thin film transistors in a CMOS configuration, each driving means for driving one of the source lines and gate lines and disposed on the substrate outside of the active display region, said thin film transistors of said at least one driving means formed in said CMOS configuration being dimensioned to provide a desired operating condition or a driving means for an active matrix device, the shift register thin film transistors in the CMOS configuration and the thin film transistors formed in the display region each including a gate, the gate length of at least one shift register thin film transistor in the CMOS configuration being less than the gate length of at least one thin film transistor formed in the display region.

108. The active matrix device of claim 107, wherein said driving means further includes sample and hold means responsive to the shift register for temporarily storing video data.

109. The active matrix device of claim 108, wherein the sample and hold means includes a plurality of thin film transistors, each thin film transistor of the sample and hold means having a gate, the gate length of each thin film transistor in the sample and hold means being less than the gate length of each thin film transistor in the shift register.

110. An active matrix liquid crystal display panel comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor;

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration being dimensioned to provide a desired operating condition for a driving means for an active matrix liquid crystal display panel;

the substrate having a substantially rectangular shape with the display region centrally positioned on the substrate and with the driving means disposed along one side of the substrate;

an opposed substrate having at least one common electrode disposed thereon and spaced apart from the substrate; and

a liquid crystal material disposed in the space between the substrate and opposed substrate;

said driving means further includes sample and hold means responsive to the shift register for temporarily storing video data;

the sample and hold means including a plurality of thin film transistors, the thin film transistors of the sample and hold means and of the driving means shift register each having a gate, the gate length of each thin film transistor in the sample and hold means being less than the gate length of each thin film transistor of the driving means shift register.

111. An active matrix liquid crystal panel, comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor;

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration being dimensioned to provide a desired operating condition for a driving means for an active matrix liquid crystal display panel, the shift register thin film transistors in the CMOS configuration and the thin film transistors formed in the display region each including a gate, the gate length of at least one shift register thin film transistor in the CMOS configuration being less than the gate length of at least one thin film transistor formed in the display region;

the substrate having a substantially rectangular shape with the display region centrally positioned on the substrate and with the driving means disposed along one side of the substrate;

an opposed substrate having at least one common electrode disposed thereon and spaced apart from the substrate; and

a liquid crystal material disposed in the space between the substrate and opposed substrate.

112. The active matrix liquid crystal display panel of claim 111, wherein said driving means further includes sample and hold means responsive to the shift register for temporarily storing video data.

113. The active matrix liquid crystal display panel of claim 112, wherein the sample and hold means includes a plurality of thin film transistors, each thin film transistor of the sample and hold means having a gate, the gate length of each thin film transistor in the sample and hold means being less than the gate length of each thin film transistor in the shift register.

114. In a projection type color display device having a light source for projecting light toward a blue dichroic mirror, a green dichroic mirror and a red dichroic mirror for reflecting components of light for modulation by a blue liquid crystal light valve, a green liquid crystal light valve and a red liquid crystal light valve, respectively, the modulated components of light passing through a dichroic prism system for projecting a synthesized color image, each light valve comprising:

a substrate;

an active matrix display region formed on the substrate, the display region including a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor being connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor; and

driving means formed on the substrate adjacent to the display region for driving at least one of the source lines and gate lines and including a shift register with thin film transistors in a CMOS configuration, the thin film transistors of the driving means in a CMOS configuration being dimensioned to provide a desired operating condition for said liquid crystal light valve, said driving means further including sample and hold means responsive to the shift register for temporarily storing video data, the sample and hold means including a plurality of thin film transistors, the thin film transistors of the sample and hold means and of the driving means shift register each having a gate, the gate length of each thin film transistor in the sample and hold means being less than the gate length of each thin film transistor of the driving means shift register.

115. In a projection type color display device having a light source for projecting light toward a blue dichroic mirror, a green dichroic mirror and a red dichroic mirror for reflecting components of light for modulation by a blue liquid crystal light valve, a green liquid crystal light valve and a red liquid crystal light valve, respectively, the modulated components of light passing through a dichroic prism system for projecting a synthesized color image, each light valve comprising:

a substrate;

an active matrix display region formed on the substrate, the display region including a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor being connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor; and

driving means formed on the substrate adjacent to the display region for driving at least one of the source lines and gate lines and including a shift register with thin film transistors in a CMOS configuration, the thin film transistors of the driving means in a CMOS configuration being dimensioned to provide a desired operating condition for said liquid crystal light valve, the shift register thin film transistors in the CMOS configuration and the thin film transistors formed in the display region each including a gate, the gate length of at least one shift register thin film transistor in the CMOS configuration being less than the gate length of at least one thin film transistor formed in the display region.

116. The projection type color display device of claim 115, wherein said driving means further includes sample and hold means responsive to the shift register for temporarily storing video data.

117. The projection type color display device of claim 116, wherein the sample and hold means includes a plurality of thin film transistors, each thin film transistor of the sample and hold means having a gate, the gate length of each thin film transistor in the sample and hold means being less than the gate length of each thin film transistor in the shift register.

118. An active matrix device comprising:

a substrate;

an active display region including a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate, a matrix of driving electrodes being disposed substantially at the source line-gate line intersections and at least one thin film transistor connected to each source line-gate line intersection;

each active display region transistor coupling the driving electrode associated with the active display region transistor to a source line of the active display region transistor;

the active display region being centrally positioned on the substrate; and

at least one driving means including a shift register having thin film transistors in a CMOS configuration, each driving means for driving one of the source lines and gate lines and disposed on the substrate outside of the active display region, said thin film transistors of said at least one driving means formed in said CMOS configuration being dimensioned to provide a desired operating condition for said driving means for an active matrix device, the resistance when turned ON of at least one shift register thin film transistor in the CMOS configuration being less than the resistance when turned ON of at least one thin film transistor formed in the display region.

119. An active matrix liquid crystal display panel, comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor;

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration being dimensioned to provide a desired operating condition for a driving means for an active matrix liquid crystal display panel, the resistance when turned ON of at least one shift register thin film transistor in the CMOS configuration being less than the resistance when turned ON of at least one thin film transistor formed in the display region

the substrate having a substantially rectangular shape with the display region centrally positioned on the substrate and with the driving means disposed along one side of the substrate;

an opposed substrate having at least one common electrode disposed thereon and spaced apart from the substrate; and

a liquid crystal material disposed in the space between the substrate and opposed substrate.

120. In a projection type color display device having a light source for projecting light toward a blue dichroic mirror, a green dichroic mirror and a red dichroic mirror for reflecting components of light for modulation by a blue liquid crystal light valve, a green liquid crystal light valve and a red liquid crystal light valve, respectively, the modulated components of light passing through a dichroic prism system for projecting a synthesized color image, each light valve comprising:

a substrate;

an active matrix display region formed on the substrate, the display region including a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gates lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor being connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor; and

driving means formed on the substrate adjacent to the display region for driving at least one of the source lines and gate lines and including a shift register with thin film transistors in a CMOS configuration, the thin film transistors of the driving means in a CMOS configuration being dimensioned to provide a desired operating condition for said liquid crystal light valve, the resistance when turned ON of at least one shift register then film transistor in the CMOS configuration being less than the resistance when turned ON of at least one thin film transistor formed in the display region.

121. An active device, comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines;

a plurality of substantially parallel gate lines crossing the plurality of substantially parallel source lines forming a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each diving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor; and

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration being dimensioned to provide a desired operating condition for a driving means for an active matrix device, the shift register thin film transistors including P-type and N-type thin film transistors, each P-type thin film transistor and N-type thin film transistor having a source, drain, gate insulating layer and separating region for separating the source from drain, said source drain and separating region of each P-type thin film transistor and each N-type thin film transistor being formed from a thin silicon film and sandwiched between and bordered by said substrate and associated gate insulating layer wherein said separating region in each P-type thin film transistor has a thickness which is less than a maximum calculated depletion layer thickness X_PMAX and wherein said separating region in each N-type thin film transistor has a thickness which is less than a maximum calculated depletion layer thickness X_NMAX,

where;

space="preserve" listing-type="equation">X.sub.PMAX =(2ε

×

2φ

fP).sup.1/2 ×

(q×

ND).sup.-1/2

space="preserve" listing-type="equation">X.sub.NMAX =(2ε

×

2φ

fN).sup.1/2 ×

(q×

NA).sup.-1/2

q=a unit of electric charge,

ε

=the dielectric constant of a thin silicon film,

φ

fP=a fermi energy of a P type TFT,

φ

fN=the fermi energy of an N type TFT,

ND=equivalent donor density of the thin silicon film formed between the associated gate insulating layer and the substrate,

NA=equivalent acceptor density of the thin silicon film formed between the associated gate insulating layer and the substrate.

122. An active matrix device, comprising:

a substrate;

an active display region including a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate, a matrix of driving electrodes being disposed substantially at the source line-gate line intersections and at least one thin film transistor connected to each source line-gate line intersection;

each active display region transistor coupling the driving electrode associated with the active display region transistor to a source line of the active display region transistor;

the active display region being centrally positioned on the substrate; and

at least one driving means including a shift register having thin film transistors in a CMOS configuration, each driving means for driving one of the source lines and gate lines and disposed on the substrate outside of the active display region, said thin film transistors of said at least one driving means formed in said CMOS configuration being dimensioned to provide a desired operating condition for said driving means for an active matrix device, the shift register thin film transistors including P-type and N-type thin film transistors, each P-type thin film transistor and N-type thin film transistor having a source, drain, gate insulating layer and separating region for separating the source from drain, said source drain and separating region of each P-type thin film transistor and each N-type thin film transistor being formed from a thin silicon film and sandwiched between and bordered by said substrate and associated gate insulating layer wherein said separating region in each P-type thin film transistor has a thickness which is less than a maximum calculated depletion layer thickness X_PMAX and wherein said separating region in each N-type thin film transistor has a thickness which is less than a maximum calculated depletion layer thickness X_NMAX,

where;

space="preserve" listing-type="equation">X.sub.PMAX =(2ε

×

2φ

fP).sup.1/2 ×

(q×

ND).sup.-1/2

space="preserve" listing-type="equation">X.sub.NMAX =(2ε

×

2φ

fN).sup.1/2 ×

(q×

NA).sup.-1/2

q=a unit of electric charge,

ε

=the dielectric constant of a thin silicon film,

φ

fP=a fermi energy of a P type TFT,

φ

fN=the fermi energy of an N type TFT,

ND=equivalent donor density of the thin silicon film formed between the associated gate insulating layer and the substrate,

NA=equivalent acceptor density of the thin silicon film formed between the associated gate insulating layer and the substrate.

123. An active matrix liquid crystal display panel, comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor;

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration being dimensioned to provide a desired operating condition for a driving means for an active matrix liquid crystal display panel;

a substrate having a substantially rectangular shape with the display region centrally positioned on the substrate and with the driving means disposed along one side of the substrate;

an opposed substrate having at least one common electrode disposed thereon and spaced apart from the substrate; and

a liquid crystal material disposed in the space between the substrate and opposed substrate;

the shift register thin film transistors including P-type and N-type thin film transistors, each P-type thin film transistor and N-type thin film transistor having a source, drain, gate insulating layer and separating region for separating the source from drain, said source drain and separating region of each P-type thin film transistor and each N-type thin film transistor being formed from a thin silicon film and sandwiched between and bordered by said substrate and associated gate insulating layer wherein said separating region in each P-type thin film transistor has a thickness which is less than a maximum calculated depletion layer thickness X_PMAX and wherein said separating region in each N-type thin film transistor has a thickness which is less than a maximum calculated depletion layer thickness X_NMAX,

where;

space="preserve" listing-type="equation">X.sub.PMAX =(2ε

×

2φ

fP).sup.1/2 ×

(q×

ND).sup.-1/2

space="preserve" listing-type="equation">X.sub.NMAX =(2ε

×

2φ

fN).sup.1/2 ×

(q×

NA).sup.-1/2

q=a unit of electric charge,

ε

=the dielectric constant of a thin silicon film,

φ

fP=a fermi energy of a P type TFT,

φ

fN=the fermi energy of an N type TFT,

ND=equivalent donor density of the thin silicon film formed between the associated gate insulating layer and the substrate,

NA=equivalent acceptor density of the thin silicon film formed between the associated gate insulating layer and the substrate.

124. In a projection type color display device having a light source for projecting light toward a blue dichroic mirror, a green dichroic mirror and a red dichroic mirror for reflecting components of light for modulation by a blue liquid crystal light valve, a green liquid crystal light valve and a red liquid crystal light valve, respectively, the modulated components of light passing through a dichroic prism system for projecting a synthesized color image, each light valve comprising:

a substrate;

an active matrix display region formed on the substrate, the display region including a plurality of substantially parallel source lines crossing a plurality of substantially parallel gate lines to form a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor being connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor;

driving means formed on the substrate adjacent to the display region for driving at least one of the source lines and gate lines and including a shift register with thin film transistors in a CMOS configuration, the thin film transistors of the driving means in a CMOS configuration being dimensioned to provide a desired operating condition for said liquid crystal light valve, the shift register thin film transistors including P-type and N-type thin film transistors, each P-type thin film transistor and N-type thin film transistor having a source, drain, gate insulating layer and separating region for separating the source from drain, said source drain and separating region of each P-type thin film transistor and each N-type thin film transistor being formed from a thin silicon film and sandwiched between and bordered by said substrate and associated gate insulating layer wherein said separating region in each P-type thin film transistor has a thickness which is less than a maximum calculated depletion layer thickness X_PMAX and wherein said separating region in each N-type thin film transistor has a thickness which is less than a maximum calculated depletion layer thickness X_NMAX,

where;

space="preserve" listing-type="equation">X.sub.PMAX =(2ε

×

2φ

fP).sup.1/2 ×

(q×

ND).sup.-1/2

space="preserve" listing-type="equation">X.sub.NMAX =(2ε

×

2φ

fN).sup.1/2 ×

(q×

NA).sup.-1/2

q=a unit of electric charge,

ε

=the dielectric constant of a thin silicon film,

φ

fP=a fermi energy of a P type TFT,

φ

fN=the fermi energy of an N type TFT,

ND=equivalent donor density of the thin silicon film formed between the associated gate insulating layer and the substrate,

NA=equivalent acceptor density of the thin silicon film formed between the associated gate insulating layer and the substrate.

125. An active matrix device comprising:

a substrate having an active display region and at least one driver region;

a plurality of substantially parallel source lines;

a plurality of substantially parallel gate lines crossing the plurality of substantially parallel source lines forming a plurality of source line-gate line intersections, the source lines and gate lines being disposed on the substrate in the display region;

a matrix of driving electrodes, each driving electrode being disposed substantially at one of the source line-gate line intersections;

a matrix of thin film transistors formed in the display region, each thin film transistor connected to one of the source line-gate line intersections and serving as switching means for coupling the driving electrode associated with the transistor to the source line of the transistor; and

driving means formed on the substrate in the at least one driver region for driving at least one of the source lines and gate lines and including a shift register having thin film transistors in a CMOS configuration, said thin film transistors of said driving means in said CMOS configuration being dimensioned to provide a desired operating condition for a driving means for an active matrix device, the driving means including a plurality of adjacent unit cells, the unit cells having a pitch substantially equivalent to the pitch of the driving electrodes in the display region, each unit cell in the driving means including thin film transistors in a CMOS configuration, the driving means thin film transistors including P-type and N-type thin film transistors each unit cell being electrically isolated from each other unit cell with a silicon thin film disposed as an island overlapping two adjacent cells to form one of the N-type and P-type thin film transistors and with silicon thin film disposed in the form of islands overlapping two other unit cells to form the other of the N-type and P-type thin film transistor in a staggered arrangement.