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Packaging architecture for a highly parallel multiprocessor system

  • US 5,251,097 A
  • Filed: 06/11/1990
  • Issued: 10/05/1993
  • Est. Priority Date: 06/11/1990
  • Status: Expired due to Term
First Claim
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1. An apparatus for packaging circuitry means for a computer processing system, said apparatus comprising:

  • a first substrate and a second substrate spaced apart from said first substrate, said first and second substrates each comprising a generally planar structure including;

    a first substrate area having a plurality of circuitry elements and a plurality of backplane external interconnections operably connected to said first substrate area and means for providing a plurality of signal paths to and from said circuitry elements and to and from said backplane external interconnections; and

    a second substrate area having a plurality of circuitry elements operably connected to said second substrate area and means for providing a plurality of signal paths to and from said circuitry elements; and

    transformation board means intersecting said first and second substrates for providing a plurality of signal paths for connecting said signal paths between said first and second substrate areas and between said first and second substrates,such that the intersection of said transformation board means with said first and second substrates defines a planar boundary between said first and second substrate area on each of said first and second substrates and the only connections to and from said circuitry elements on said second substrate areas are via said signal paths on said transformation board means to said signal paths and said backplane external interconnections on said first substrate areas.

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