System for removing material from semiconductor wafers using a contained plasma

• US 5,254,830 A
• Filed: 05/07/1991
• Issued: 10/19/1993
• Est. Priority Date: 05/07/1991
• Status: Expired due to Term

• Current Assignee: SpeedFam-Ipec Corporation (Lam Research Corporation)
• Original Assignee: Hughes Aircraft Company (Rtx Corporation)
• Inventors: Zarowin, Charles, Bollinger, L. D.
• Primary Examiner(s): Paschall, Mark H.
• Application Number:
  US07/696,897
• Time in Patent Office: 896 Days
• Field of Search: 219/121.43, 219/121.41, 219/121.59, 219/121.54, 156/643, 156/646, 156/345, 204/298.31, 204/298.34, 204/298.32
• US Class Current: 219/121.43
• CPC Class Codes: H01J 2237/334 Etching
• CPC Class Codes: H01J 37/32935 Monitoring and controlling tubes by information coming from the object and/or discharge
• CPC Class Codes: H01J 37/32963 End-point detection
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/67069 for drying etching
• CPC Class Codes: H01L 21/67253 Process monitoring, e.g. flow or thickness monitoring
• CPC Class Codes: H01L 21/76251 using bonding techniques
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Abstract

A system for thinning wafers includes thickness measuring apparatus that provides information to a computer for generating a memory map of the wafer surface. The memory map is used to control a material removal apparatus that thins the wafer to a uniform thickness.

Claims

1. A system for removing material from a semiconductor wafer;

said system comprising;

means for determining thickness profile data for said semiconductor wafer;

means for generating a dwell time versus position map for said semiconductor wafer, said map being generated from said thickness profile data; and

means for removing material from said semiconductor wafer, said material removing means being controlled in accordance with said dwell time versus position map, said means including a plasma chemical etching chamber having a platform for receiving said semiconductor wafer, a means for creating a contained plasma within said chamber, said contained plasma having an etching footprint smaller than the dimension of thickness variation to be removed, and a means for controlling the dwell time and position of said plasma in accordance with said dwell time versus position map.

2. The system as claimed in claim 1, wherein said thickness profile determining means includes an interferometer.

3. The system as claimed in claim 2, wherein said interferometer computes said thickness on a point-by-point basis.

4. The system as claimed in claim 1, wherein said thickness profile determining means includes an ellipsometer.

5. The system as claimed in claim 1, wherein said thickness profile determining means includes a full surface interferometer.

6. The system as claimed in claim 1, further comprising;

means for delivering one or more wafers to said thickness profile data determining means.

7. The system as claimed in claim 1, further comprising:

means for determining thickness profile data subsequent to said material removal.

8. The system as claimed in claim 1, further comprising:

means for transporting one or more wafers away from said material removal means.

9. The system as claimed in claim 2, wherein said wafer includes a a film on a surface thereof and said thickness profile data relates to said film thickness.

10. The system as claimed in claim 9, wherein said film is a layer of silicon.

11. The system as claimed in claim 10, wherein said layer of silicon is disposed over a layer of insulating material.

12. The system as claimed in claim 11 wherein said layer of insulating material is disposed over a silicon substrate, said silicon substrate and said silicon film being spaced apart by said layer of insulating material.

13. The system as claimed in claim 1 wherein said generating means includes means for subtracting said thickness profile data from preselected profile data such that said dwell time versus position map represents a surface having said preselected profile.

14. The system as claimed in claim 1 wherein said plasma chamber further includes:

means for tilting said wafer with respect to said plasma creating means; and

means for controlling the distance between said wafer and said plasma creating means.

15. The system as claimed in claim 1 wherein said controlling means includes means for moving said wafer with respect to said means for creating a plasma.

16. A system for thinning silicon-on-insulator semiconductor wafers, said system comprises:

means for determining thickness profile data for a silicon film overlying an insulator on said semiconductor wafer;

means for generating a dwell time versus position map for said silicon film, said map being generated from said thickness profile data; and

means for removing material from said film, said material removing means being controlled in accordance with said dwell time versus position map, said means including a plasma chemical etching chamber having a platform for receiving said semiconductor wafer, a means for creating a contained plasma within said chamber, said contained plasma having an etching footprint smaller than the dimension of thickness variation to be removed, and a means for controlling the dwell time and position of said plasma in accordance with said dwell time versus position map.

17. The system as claimed in claim 16 wherein said generating means includes means for subtracting said thickness profile data from preselected profile data such that said dwell time versus position map represents a surface having said preselected profile.

18. The system as claimed in claim 17 wherein said preselected profile data is a constant such that said silicon film is thinned to a uniform thickness with respect to said insulator.