Neural network for learning, recognition and recall of pattern sequences

• US 5,255,348 A
• Filed: 06/14/1991
• Issued: 10/19/1993
• Est. Priority Date: 06/14/1991
• Status: Expired due to Fees

• Current Assignee: Valeriy I. Nenov
• Original Assignee: Valeriy I. Nenov
• Inventors: Nenov, Valeriy I.
• Primary Examiner(s): Fleming, Michael R.
• Assistant Examiner(s): Downs, Robert W.
• Application Number:
  US07/715,573
• Time in Patent Office: 858 Days
• Field of Search: 395/21, 395/22, 395/24
• US Class Current: 706/27
• CPC Class Codes: G06F 18/00 Pattern recognition
• CPC Class Codes: G06N 3/049 Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs

Abstract

A sequence processor for rapidly learning, recognizing and recalling temporal sequences. The processor, called the Katamic system, is a biologically inspired artificial neural network based on a model of the functions of the cerebellum in the brain. The Katamic system utilizes three basic types of neuron-like elements with different functional characteristics called predictrons, recognitrons and bi-stable switches. The Katamic System is clock operated, processing input sequences pattern by pattern to produce an output pattern which is a prediction of the next pattern in the input sequence. The Katamic System learns rapidly, has a large memory capacity, exhibits sequence completion and sequence recognition capability, and is fault and noise tolerant. The system'"'"'s modular construction permits straightforward scaleability.

Claims

1. A system for processing data consisting of a temporal sequence of patterns, said system comprising:

a plurality of external and internal input means for receiving and transmitting data signals representing an element of one of said patterns;

a plurality of prediction means coupled to said external input means for producing an output signal value that is a prediction of a future data signal value in said temporal sequence pattern;

each prediction means including a plurality of interconnected dendritic compartments connected to an associated one of said internal input means for storing and transforming said input data signals;

said prediction means including a processing element producing an output activation value at its output based on its input, said processing element connected to at least one of said dendritic compartments, wherein said processing element includes means for producing an activating value which is a function of said transformed input signals from said plurality of dendritic compartments;

recognition means coupled to said external input means, and also to one associated prediction means output for producing an output signal only when a current prediction means output in response to a current input from said temporal pattern matches the next external input data signal from a subsequent input from said temporal pattern; and

gate means with inputs coupled to the output of an associated prediction means and also coupled to the output of said recognition means, said gate means also coupled between said external input means and said internal input means, the gate means operative to selectively direct either the external input means or the prediction means output to said internal input means depending on the state of the recognition means output, whereby when said current prediction means output matches the next external data signal, the prediction means produces its next output without an additional external input.

2. The system of claim 1 wherein said internal input means includes a weighted connection from one of said gate means to one of said dendritic compartments in said associated prediction means and also to dendritic compartments in a plurality of other prediction means.

3. The system of claim 2 wherein said internal input means includes a non-weighted connection to each of the dendritic compartments in said associated prediction means.

4. The system of claim 3 wherein said interconnected dendritic compartments in a given prediction means are arranged in a column-like structure with the bottom dendritic compartment in said column being connected to said processing element, and each dendritic compartment is connected to the one below it in the column, each dendritic compartment also including a positive long term memory means, a negative long term memory means, and a short term memory means, each memory means storing one of said transformed input data signal values.

5. The system of claim 4 wherein said function used by said processing element to determine its activation value is proportional to the dot product of the difference between the data values in said positive and negative long term memories and the data values in said short term memories int he dendritic compartment.

6. The system of claim 5 wherein said short term memory means in a selected dendritic compartment stores said data signal transmitted by said internal input means and wherein a decayed representation of said signal value is transferred to the adjacent short term memory means nearer said processing element in said column when a subsequent pattern in said sequence is received, said system further including a means for resetting all of said short term memories each time a new sequence is processed.

7. The system of claim 6, wherein said activation value and said data signals representing a portion of one of said patterns are either one'"'"'s or zero'"'"'s and wherein said positive and negative long term memories are updated by receiving data signals from said internal input means only when said prediction means output does not match the next input data signal, wherein said negative long term memory is updated when said prediction means makes a non-matching one prediction, and said positive long term memory is updated when said prediction means makes a non-matching zero prediction.

8. The system of claim 2 wherein said recognition means further comprises:

a plurality of comparison means each connected to one of said external input means, and also connected to said associated prediction means output;

said comparison means producing an output signal only when the data signal value on said external input means does not match said associated prediction means output;

means for summing the outputs of said comparison means;

means for comparing said sum to a predetermined threshold; and

means for transmitting an output to said gate means only when said sum exceeds the threshold, whereby said output is transmitted to said gate only when said prediction means has failed to produce a correct prediction.

9. The system of claim 1 wherein each of said plurality of said prediction means receives a different element of one of said input patterns, there being the same number of prediction means as elements in said input pattern.

10. The system of claim 9 wherein each of said comparison means comprises means for computing an exclusive-or function of the data signal value received from said connected input means.

11. The system of claim 10 wherein said recognition means has at least three comparison means, one connected to said associated prediction means, and the other two connected to other prediction means.

12. The system of claim 5, wherein said internal input means further comprises means for transmitting said input signal to dendritic compartments in prediction means adjacent to its associated prediction means.

13. A method for processing data consisting of a temporal sequence of patterns, said method comprising:

receiving and transmitting data signals representing an element of one of said patterns;

producing an output signal in a prediction unit that is a prediction of a future data signal value in said temporal sequence pattern;

storing and transforming said input signals in a plurality of dendritic compartments in said prediction unit;

producing an output activation value in a processing element in said prediction unit that is a function of said input signal from said plurality of dendritic compartments;

providing an external input network and an internal input network which is connected to at least one of said dendritic compartments in an associated prediction means;

providing a recognition unit coupled to said external input network, and also to one associated prediction unit;

producing an output signal in said recognition unit when a current prediction unit output in response to a current input from said temporal pattern matches the next input data signal in said eternal input network from a subsequent input from said temporal pattern; and

selectively directing in a gate unit the external input network or an associated prediction means output to said internal input network depending on the state of the recognition unit output, whereby when said current prediction means output matches the next external data signal, the prediction unit produces a next output without an additional external input.

14. The method of claim 13 further comprising the step of providing a weighted connection from one of said gate units to one of said dendritic compartments in said associated prediction unit and also to dendritic compartments in a plurality of other prediction units.

15. The method of claim 14 further comprising the step of providing a non-weighted connection with said internal input network to each of the other dendritic compartments in the associated prediction unit.

16. The method of claim 15 further comprising the steps of:

arranging said interconnected dendritic compartments in a given prediction unit in a column-like structure with the bottom dendritic compartment in said column being connected to said processing element, and each dendritic compartment being connected to the one below it in the column, each dendritic compartment also including a positive long term memory, a negative long term memory and a short term memory; and

producing said activation value in said processing element as a function of the relation between the data values in both long term memory and short term memory in the dendritic compartment.

17. The method of claim 16 further comprising the step of storing said data signal transmitted by said internal input network in said short term memory and transferring a decayed representation of said signal to the adjacent short term memory nearer said processing element in said column when a subsequent pattern in said sequence is received.

18. The method of claim 17 wherein the step of producing an output activation value further comprises the step of determining the dot product of the data values in the short term memory and the difference between the data values in the positive and negative long term memory in each dendritic compartment in a prediction unit.

19. A neural network for recognition of sequences of patterns, said neural network comprising:

a plurality of external and internal input means for receiving and transmitting data signals representing an element of one of said patterns;

a plurality of prediction means coupled to said external input means for producing an output signal value that is a prediction of a future data signal value in said temporal sequence pattern;

each prediction means including a plurality of interconnected dendritic compartments connected to an associated one of said internal input means for storing and transforming said input data signal values;

said prediction means including a processing element producing an output activation value at its output based on its inputs said processing element connected to at least one of said dendritic compartments, wherein said processing element includes means for producing an activation value which is a function of said transformed input signals form said plurality of dendritic compartments;

recognition means coupled to said external input means, and also to one associated prediction means output for producing an output signal only when a current prediction means output in response to a current input from said pattern matches the next external input data signal form a subsequent input from said pattern;

gate means with inputs coupled to the output of an associated prediction means and also coupled to the output of said recognition means, said gate means also coupled between said external input means and said internal input means, the gate means operative to selectively direct either the external input means or the prediction means output to said internal input means depending on the sate of the recognition means output, whereby when said current prediction means output matches the next external data signal, the prediction means produces its next output without an additional external input;

said internal input means providing a weighted connection form one of said gate means to one of said dendritic compartments in said associated prediction means and also to dendritic compartments in a plurality of other prediction means, said internal input means also provided a non-weighted connection to each of the other dendritic compartments in said associated prediction means;

said interconnected dendritic compartments in a given prediction means being arranged in a column-like structure with the bottom dendritic compartment in said column being connected to said processing element, and each dendritic compartment is connected to the one below it in the column, each dendritic compartment also including a positive long term memory means, a negative long term memory means and a short term memory means;

wherein said function used by said processing element to determine its activation value is proportional to the dot product of the difference between the data values in said positive and negative long term memory and the data values in said short term memories in the dendritic compartment.