Process for manufacturing a multilayer integrated circuit interconnection

• US 5,262,351 A
• Filed: 07/23/1991
• Issued: 11/16/1993
• Est. Priority Date: 08/21/1990
• Status: Expired due to Fees

• Current Assignee: Thomson-CSF (Thales SA)
• Original Assignee: Thomson-CSF (Thales SA)
• Inventors: Bernard, Francois, Bureau, Jean-Marc, Broussoux, Dominique, Vergnolle, Claude
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): Graybill, David E.
• Application Number:
  US07/734,671
• Time in Patent Office: 847 Days
• Field of Search: 437/183, 437/190, 437/228, 437/183, 437/184, 437/208, 437/215, 437/218, 437/915, 156/643, 257/700, 257/676, 257/778, 257/779, 257/780
• US Class Current: 257/81
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68359 used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 23/5383 Multilayer substrates H01L23/5385 takes precedence; multilayer metallisation on monolayer substrates H01L23/538
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/1627 stacked type assemblies, e.g. stacked multi-cavities
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding
• CPC Class Codes: Y10S 438/98 Utilizing process equivalents or options

Abstract

The invention is a method of producing a multilayer polymer-metal system to interconnect integrated circuits which allows two-dimensional electrical and/or optical connections between components, in which a first layer of polymer is deposited on a rigid substrate such that the layer can be separated from the substrate, in which a multilayer interconnection system is then produced on this first layer using industrial methods and in which the rigid substrate is removed after installation and connection of the integrated circuit.

Claims

1. A method for producing a multilayer polymer-metal system for interconnection of integrated circuits, compatible with two-dimensional electrical or optical connections, comprising the sequential steps of:

(a) forming a multilayer interconnection system on a rigid substrate;

(b) forming at least one integrated circuit on said multilayer interconnection system; and

(c) removing said rigid substrate from said multilayer interconnections system, thereby leaving a self-supporting multilayer connection system.

2. A method of producing a multilayer polymer-metal system to interconnect integrated circuits as described in claim 1, in which a rigid frame is fixed onto the multilayer interconnection system to surround the chips before the rigid substrate is removed.

3. A method of producing a multilayer polymer-metal system to interconnect integrated circuits as described in claim 2 in which, before the rigid substrate is removed, said integrated circuits and said rigid frame are attached to the multilayer interconnection system by melting alloy bumps.

4. A method of producing a three-dimensional electrical or optical interconnection system in which the two-dimensional self-supporting multilayer interconnection systems are produced as described in claim 2 or 3 and in which said rigid substrate is removed;

connection pads are produced on the first layer of the said multilayer system, on the face of the multilayer interconnection system exposed by removal of the said substrate; and

in which the two-dimensional multilayer interconnection systems are then stacked and connected together by said connection pads and said rigid frame.

5. A hybrid structure consisting of integrated circuits and a multilayer polymer-metal system to interconnect these circuits which allows electrical or optical connection between said integrated circuits, arranged on a two-dimensional plane, in which the said multilayer system is produced as described in claim 1.

6. A hybrid structure as described in claim 5 which includes:

a multilayer interconnection system with one or several connection pads on at least one of its main faces,

at least one integrated circuit with one or several connection pads electrically connected to pads on the system,

and at least one stiffening element mechanically attached to the said main face.

7. A hybrid structure as described in claim 6 in which the stiffening element is a frame which surrounds the integrated circuit.

8. A hybrid structure as described in claim 7 in which conductors run through the said frame.

9. A hybrid structure as described in claim 7 in which said frame is of a conductive material and said conductors running through it are insulated from said frame such that said frame forms a shield for these conductors.

10. A hybrid structure as described in any of claims 5 to 9 which includes a stack of structures to form a three-dimensional integrated circuit interconnection system.

11. A structure as described in any of claims 5 to 9 in which the multilayer interconnection system includes optical guides to transmit optical signals.