Semiconductor rectifier having high breakdown voltage and high speed operation
First Claim
1. A semiconductor rectifier comprising:
- a semiconductor substrate including a first semiconductor layer of one conductivity type and a second semiconductor layer of the one conductivity type provided on said first semiconductor layer;
a plurality of third semiconductor layers of an opposite conductivity type formed in said second semiconductor layer to provide pn junctions therebetween, said plurality of third semiconductor layers defining exposed regions of said second semiconductor layer;
a metal layer provided over an entire surface of said semiconductor substrate including said plurality of third semiconductor layers to provide Schottky barrier contact surfaces between said metal layer and each of said exposed regions of said second semiconductor layer; and
each of said plurality of third semiconductor layers being provided to satisfy two conditions given by 0°
<
θ
≦
135° and
3Wbi ≦
W≦
2WB, where θ
is an angle between one of said contact surfaces and a tangent line passing through a point f on one of said pn junctions through which a straight line passes from a top of a built-in depletion layer in parallel with each of said contact surfaces and where Wbi is a thickness of said built-in depletion layer extending to said second semiconductor layer at zero bias voltage, W is a width of each of said contact surfaces and WB is a thickness of a depletion layer at breakdown of each of said pn junctions, respectively.
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Accused Products
Abstract
A semiconductor rectifier having a high breakdown voltage and a high speed operation is provided, which includes a semiconductor substrate having an N+ -type semiconductor layer and an N-type semiconductor layer, a P+ -type semiconductor layer formed in the N-type semiconductor layer to provide a PN junction therebetween, the P+ -type semiconductor layer defining exposed regions of the N-type semiconductor layer, and a metal layer provided on an entire surface of the semiconductor substrate having the P+ -type semiconductor layer to provide contact surfaces of Schottky barrier between the metal layer and each of the exposed regions of the N-type semiconductor layer. In the structure, a configuration of the PN junction is provided to satisfy conditions given by 0°<θ≦135° and 3Wbi≦W≦2WB where θ is an angle between one of the contact surfaces and a tangent line passing through a point f on the PN junction through which a straight line passes from a top of a built-in depletion layer in parallel with each of the contact surfaces and where Wbi is a thickness of the built-in depletion layer extending to the N-type semiconductor layer at zero bias voltage, W is a width of each of the contact surfaces and WB is a thickness of a depletion layer at breakdown of the pn junction, respectively.
76 Citations
20 Claims
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1. A semiconductor rectifier comprising:
-
a semiconductor substrate including a first semiconductor layer of one conductivity type and a second semiconductor layer of the one conductivity type provided on said first semiconductor layer; a plurality of third semiconductor layers of an opposite conductivity type formed in said second semiconductor layer to provide pn junctions therebetween, said plurality of third semiconductor layers defining exposed regions of said second semiconductor layer; a metal layer provided over an entire surface of said semiconductor substrate including said plurality of third semiconductor layers to provide Schottky barrier contact surfaces between said metal layer and each of said exposed regions of said second semiconductor layer; and each of said plurality of third semiconductor layers being provided to satisfy two conditions given by 0°
<
θ
≦
135° and
3Wbi ≦
W≦
2WB, where θ
is an angle between one of said contact surfaces and a tangent line passing through a point f on one of said pn junctions through which a straight line passes from a top of a built-in depletion layer in parallel with each of said contact surfaces and where Wbi is a thickness of said built-in depletion layer extending to said second semiconductor layer at zero bias voltage, W is a width of each of said contact surfaces and WB is a thickness of a depletion layer at breakdown of each of said pn junctions, respectively. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A semiconductor rectifier comprising:
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a semiconductor substrate including a first semiconductor layer of one conductivity type and a second semiconductor layer of the one conductivity type provided on said first semiconductor layer; grooves formed in said second semiconductor layer to provide projected portions thereof; a first diffused region of an opposite conductivity type formed in an entire surface of each of said projected portions; a second diffused region of an opposite conductivity type formed in a bottom of each of said grooves containing a part of a side surface thereof to define the nearest distance between adjacent second diffused regions; and a metal layer provided on an entire surface of said semiconductor substrate having said grooves to provide contact surfaces between said metal layer and each of exposed regions of said second semiconductor layer defined between said first and second diffused regions. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification