Large scale integrated circuit for low voltage operation
First Claim
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1. A semiconductor device comprising:
- a plurality of data lines, a plurality of word lines intersecting them, memory cells located at the intersecting points, and sense amplifiers each for amplifying a memory cell signal read out on each of the data lines;
each of said memory cells comprising a switching means which is controlled by a voltage on each of the word lines, and a capacitor having at last two terminals for signal storage, and one of the terminals of the capacitor being connected with each of the data lines through the switching means and another terminal connected with a first control signal line; and
a maximum voltage amplitude of said first control signal line being larger than that of said data lines, wherein a potential of each of said data lines is amplified to an amplitude of 2V or less for a memory read or write operation, and the potential of each of said data lines is precharged at an intermediate level between high and low levels of the voltage amplitude during a stand-by period for said read or write operation.
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Abstract
Disclosed is a one-chip ULSI which can carry out the fixed operation in a wide range of power supply voltage (1 V to 5.5 V). This one-chip ULSI is composed of a voltage converter circuit(s) which serves to a fixed internal voltage for a wide range of power supply voltage, an input/output buffer which can be adapted to several input/output levels, a dynamid RAM(s) which can operate at a power supply voltage of 2 V or less, etc. This one-chip ULSI can be applied to compact and portable electronic devices such as a lap-top type personal computer, an electronic pocket note book, a solid-state camera, etc.
64 Citations
29 Claims
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1. A semiconductor device comprising:
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a plurality of data lines, a plurality of word lines intersecting them, memory cells located at the intersecting points, and sense amplifiers each for amplifying a memory cell signal read out on each of the data lines; each of said memory cells comprising a switching means which is controlled by a voltage on each of the word lines, and a capacitor having at last two terminals for signal storage, and one of the terminals of the capacitor being connected with each of the data lines through the switching means and another terminal connected with a first control signal line; and a maximum voltage amplitude of said first control signal line being larger than that of said data lines, wherein a potential of each of said data lines is amplified to an amplitude of 2V or less for a memory read or write operation, and the potential of each of said data lines is precharged at an intermediate level between high and low levels of the voltage amplitude during a stand-by period for said read or write operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29)
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Specification