Method and means for accessing DASD arrays with tuned data transfer rate and concurrency

• US 5,263,145 A
• Filed: 05/24/1990
• Issued: 11/16/1993
• Est. Priority Date: 05/24/1990
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Goldstein, Stephen, Wang Ju, Jean H., Cintron, Ruth E., Brady, James T., Menon, Jaishankar M.
• Primary Examiner(s): CHUN, DEBRA
• Application Number:
  US07/528,999
• Time in Patent Office: 1,272 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 395/425, 395/275, 395/575, 371/2.2, 371/10.1
• US Class Current: 711/114
• CPC Class Codes: G06F 11/1008 in individual solid state devices G06F11/1004 takes precedence
• CPC Class Codes: G06F 11/1076 Parity data used in redundant arrays of independent storages, e.g. in RAID systems
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G11B 20/10 Digital recording or reproducing
• CPC Class Codes: G11B 20/1833 by adding special lists or symbols to the coded information G11B20/1806, G11B20/1866 take precedence

Abstract

A method and means for managing access to a logical track of KN blocks of which K are parity blocks. The KN blocks are distributed and stored in an array of N DASDs having K blocks per physical track per DASD. The array includes control means for securing synchronous access to selectable ones of the DASDs responsive to each access request. The method involves (a) formatting the blocks onto the array using a row major order modulus as the metric for balancing the data rate and concurrency (the number of DASDs bound per access) and (b) executing the random sequences of large and small access requests over the array.

Claims

1. A method for managing accesses received from an external source to at least one logical track having KN sequentially ordered blocks distributed and stored onto an array of N DASDs in which a single parameter M specifies the trade off between data rate and concurrency, each DASD including a cyclic track recording medium, each track having a storage capacity of K blocks, said array including control means for securing synchronous access to selectable ones of the N DASDs, comprising the steps at the control means of:

(a) formatting and writing of the KN blocks onto N tracks of the N DASDs of the array responsive to a command from said source specifying a value for parameter M, said blocks being written on said N tracks in row major order K modulo M and in column major order K module MN, M being less than or equal to K; and

(b) executing access requests over the array from said external source such that each access of any subset of KN blocks formatted and written according to step (a) constitutes a synchronous data exchange of b blocks at a time with b counterpart DASDs and further such that (N-b) DASDs are concurrently available for binding to another access request, M being inversely related to b.

8. The method according to either claim 1 or 2, wherein the number of sequentially ordered blocks are T*KN, T being the number of logical tracks, and further wherein M lies in the closed integer interval (1,TK).

2. A method for managing access to at least one logical track of KN blocks of which K are partly in which a single parameter M specifies the trade off between data rate and concurrency, said KN blocks being distributed and stored in an array of N DASDs, each DASD including a cyclic track recording medium, each track having a storage capacity of K blocks, said array including control means responsive to read and write accesses from an external source for securing synchronous access to selectable ones of the N DASDs, comprising the steps at the control means of:

(a) formatting and writing of the KN blocks onto N tracks of counterpart N DASDs of the array responsive to a command from said source including a value for parameter M, said blocks being written on said N tracks in row major order K modulo M and in column major order K modulo MN, M lying in the closed integer interval (1,K); and

(b) executing access requests from said external source over the N DASDs of the array such that each access of any subset of KN blocks formatted and written according to step (a) constitutes a synchronous exchange of b blocks at a time with b counterpart DASDs, and, further such that (N-b) other DASDs are concurrently available for binding to another access request and further such that the minimum number of blocks transferred in order to achieve a maximum data rate lies in the closed interval ((N-1, N-1)K) for any given M.

3. The method according to claim 2, wherein said formatting and writing step includes formatting and writing the array with KN blocks such that the tracks on the counterpart N-1 DASDs contain (N-1)K data blocks and further such that the track of the Nth DASD contains K parity blocks, each parity block spanning N-1 data blocks in column major order.

4. The method according to claim 3, wherein responsive to an update access modifying at least one data block at array location (i,j), the execution step further includes the steps of

(c) synchronously reading the current data block at array location (i,j) and the current parity block at location (N,j), where i and j lie in the respective closed integer intervals (1,N-1) and (1,K);

(d) altering the contents of the data block read from location (i,j);

(e) calculating a new parity by XORing the current contents of the parity block read from location (N,j), and the current and altered contents of the data block read from location (i,j);

and

(f) synchronously writing the altered data block and the new parity block back in place.

5. The method according to claim 4, wherein said array further includes a cache operably responsive to said control means, and wherein the execution step further includes the step of:

(g) accessing said cache or a block at array location (i,j), and, in the event said data block is unavailable in said cache, staging blocks including said data block to said cache from array locations (i,j) through (i,K) on the ith DASD.

6. The method according to claim 3, wherein K parity blocks associated with a first group or logical track of KN blocks being stored on a first track of the Nth DASD, and further wherein K parity blocks associated with a second group or logical track of KN blocks being stored on a first track of the (N-1)th DASD, and further wherein the K parity blocks associated with a third group or logical track of KN blocks being stored on a first track of the (N-2)th DASD.

7. The method according to claim 2, wherein K parity blocks are distributed across N DASD of the array K modulo M such that exactly M parity blocks are written to the counterpart physical track of each DASD.

9. In a system having a CPU, an array of N DASDs, and means intercoupling the CPU and the array for synchronously accessing selectable ones of the DASDs, said means including means responsive to KN sequentially ordered blocks from said CPU for writing said blocks onto N DASDs in which a single parameter M specifies the trade off between data rate and concurrency, each DASD including a cyclic track recording medium, each track having a storage capacity of K blocks, wherein said intercoupling means further comprise:

(a) means for formatting and writing the KN blocks onto N tracks of the N DASDs of the array responsive to a command from said CPU including a value for parameter M, said blocks being written on said N tracks in row major order K modulo M and in column major order K modulo MN, M being less than or equal to K; and

(b) means for executing access requests over the array from said CPU such that each access of any subset of KN blocks formatted and written according to step (a) constitutes a synchronous data exchange of b blocks at a time with b counterpart DASDs and further such that (N-b) DASDs are concurrently available for binding to another access request, M being an inverse function of b.

10. The system according to claim 9, wherein said accessing means further comprises:

(c) a cache for storing a predetermined number of blocks therein and responsive to access requests originating from the CPU for exchanging requested blocks with the CPU if available or cause the request to passed to the DASDs;

(d) means for staging blocks to the cache from the requested block to the physical end of track on the counterpart DASD.