Method and apparatus for compensation of imbalance in zero-if downconverters

• US 5,263,196 A
• Filed: 11/19/1990
• Issued: 11/16/1993
• Est. Priority Date: 11/19/1990
• Status: Expired due to Term

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Jasper, Steven C.
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): PHAM, CHI H
• Application Number:
  US07/615,107
• Time in Patent Office: 1,093 Days
• Field of Search: 455/60, 455/305, 455/312, 455/324, 455/337, 455/245.1, 455/239.1, 455/295, 370/20, 375/77, 375/97, 375/98, 375/102
• US Class Current: 455/324
• CPC Class Codes: H03D 1/2245 using two quadrature channels H03D1/2209 takes precedence
• CPC Class Codes: H03D 3/006 by sampling the oscillations and further processing the samples, e.g. by computing techniques H03D3/007 takes precedence
• CPC Class Codes: H03D 3/007 by converting the oscillations into two quadrature related signals H03D3/245 takes precedence
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04L 5/06 the signals being represented by different frequencies combined with time-division multiplexing H04L5/26

Abstract

To compensate the audio distortion resulting from amplitude and phase imbalance in the quadrature oscillator (103) and mixers (105, 115) in zero-IF downconverters (203), a balancing action is required. An apparatus for distortion compensation compensates for the amplitude and phase imbalance to reduce audio distortion. This is accomplished by determining (309) two gain values, which are combined (217, 227, 229) with the in-phase and quadrature components of the zero-IF downconverter (203) to compensate for the imbalance.

Claims

1. A distortion compensator for phase and amplitude imbalance in zero-IF downconverters processing real and imaginary signal components, comprising:

a first means for processing the real and imaginary signal components to produce a gain control value;

a second means for processing the real and imaginary signal components to produce a phase control value; and

means for coupling said gain and phase control values to the zero-IF downconverter, wherein said first means for processing further comprises;

means for squaring a sum of the real and imaginary signal components, producing a squared real part and a squared imaginary part;

means for scaling the squared real part by a first loop gain constant;

means for adding said scaled squared real part to said gain control value, yielding a real squared sum; and

means for accumulating said real squared sum, providing said gain control value.

2. A distortion compensator for phase and amplitude imbalance in zero-IF downconverters processing real and imaginary signal components, comprising:

a first means for processing the real and imaginary signal components to produce a gain control value;

a second means for processing the real and imaginary signal components to produce a phase control value; and

means for coupling said gain and phase control values to the zero-IF downconverter, wherein said second means for processing further comprises;

means for squaring a sum of the real and imaginary signal components, producing a squared real part and a squared imaginary part;

means for scaling the squared imaginary part by a second loop gain constant;

means for adding said scaled squared imaginary part to said phase control value, yielding an imaginary squared sum; and

means for accumulating said imaginary squared sum, providing said phase control value.

3. A distortion compensator for phase and amplitude imbalance in zero-IF downconverters processing real and imaginary signal components, comprising:

a first means for processing the real and imaginary signal components to produce a gain control value;

a second means for processing the real and imaginary signal components to produce a phase control value; and

means for coupling said gain and phase control values to the zero-IF downconverter,

wherein said first means for processing further comprises;

means for mixing the real and imaginary signal components with a first frequency carrier, producing a first mixed signal;

means for mixing the real and imaginary signal components with a negative of said first frequency carrier, producing a second mixed signal;

means for mixing said first mixed signal with said second mixed signal, resulting in a first mixed real part and a first mixed imaginary part;

means for scaling the first mixed real part by a first loop gain constant;

means for adding scaled first mixed real part to said gain control value, yielding a real mixed sum; and

means for accumulating said real mixed sum, providing said gain control value;

and wherein said second means for processing further comprises;

means for mixing the real and imaginary signal components with a second frequency carrier, producing a third mixed signal;

means for mixing the real and imaginary signal components with a negative of said second frequency carrier, producing a fourth mixed signal;

means for mixing said third mixed signal with said fourth mixed signal, resulting in a second mixed real part and a second mixed imaginary part;

means for scaling the second mixed imaginary part by a second loop gain constant;

means for adding said scaled second mixed imaginary part to said phase control value, yielding an imaginary mixed sum; and

means for accumulating said imaginary mixed sum, providing said phase control value.

4. A method of distortion compensation for phase and amplitude imbalance in zero-IF downconverters processing real and imaginary signal components, comprising the steps of:

first processing the real and imaginary signal components to produce a gain control value;

second processing the real and imaginary signal components to produce a phase control value; and

coupling, responsive to said steps of processing, said gain and phase control values to the zero-IF downconverter, wherein said first step of processing further comprises the steps of;

squaring a sum of the real and imaginary signal components, producing a squared real part and a squared imaginary part;

scaling the squared real part by a first loop gain constant;

adding said scaled squared real part to said gain control value, yielding a real squared sum; and

accumulating said real squared sum, providing said gain control value.

5. A method of distortion compensation for phase and amplitude imbalance in zero-IF downconverters processing real and imaginary signal components, comprising the steps of:

first processing the real and imaginary signal components to produce a gain control value;

second processing the real and imaginary signal components to produce a phase control value; and

coupling, responsive to said steps of processing, said gain and phase control values to the zero-IF downconverter, wherein said second step of processing further comprises the steps of;

squaring a sum of the real and imaginary signal components, producing a squared real part and a squared imaginary part;

scaling the squared imaginary part by a second loop gain constant;

adding said scaled squared imaginary part to said phase control value, yielding an imaginary squared sum; and

accumulating said imaginary squared sum, providing said phase control value.

6. A method of distortion compensation for phase and amplitude imbalance in zero-IF downconverters processing real and imaginary signal components, comprising the steps of:

first processing the real and imaginary signal components to produce a gain control value;

second processing the real and imaginary signal components to produce a phase control value; and

coupling, responsive to said steps of processing, said gain and phase control values to the zero-IF downconverter.

wherein said first step of processing further comprises the steps of;

mixing the real and imaginary signal components with a first frequency carrier, producing a first mixed signal;

mixing the real and imaginary signal components with a negative of said first frequency carrier, producing a second mixed signal;

mixing said first mixed signal with said second mixed signal, resulting in a first mixed real part and a first mixed imaginary part;

scaling the first mixed real part by a first loop gain constant;

adding said scaled first mixed real part to said gain control value, yielding a real mixed sum; and

accumulating said real mixed sum, providing said gain control value;

and wherein said second step of processing further comprises the steps of;

mixing the real and imaginary signal components with a second frequency carrier, producing a third mixed signal;

mixing the real and imaginary signal components with a negative of said second frequency carrier, producing a fourth mixed signal;

mixing said third mixed signal with said fourth mixed signal, resulting in a second mixed real part and a second mixed imaginary part;

scaling the second mixed imaginary part by a second loop gain constant;

adding said scaled second mixed imaginary part to said phase control value, yielding an imaginary mixed sum; and

accumulating said imaginary mixed sum, providing said phase control value.

7. A distortion compensator for phase and amplitude imbalance in a zero-IF downconverter processing real and imaginary signal components, comprising:

means for multiplying the real signal component by a first gain value, producing a corrected real component;

means for multiplying the real signal component by a second gain value, yielding a scaled real component;

means for adding said scaled real component to the imaginary signal component, providing a compensated imaginary component; and

means for processing said corrected real component and said compensated imaginary component to drive said first gain value and said second gain value.

8. The distortion compensator of claim 7 wherein said means for processing further comprises:

means for squaring a sum of said corrected component and said compensated imaginary component, producing a squared real part and a squared imaginary part;

means for scaling the squared real part by a first loop gain constant;

means for adding said scaled squared real part to said first gain value, yielding a real squared sum; and

means for accumulating said real squared sum, providing said first gain value.

9. The distortion compensator of claim 7 wherein said means for processing further comprises:

means for squaring a sum of said corrected real component and said compensated imaginary component, producing a squared real part and a squared imaginary part;

means for scaling the squared imaginary part by a second loop gain constant;

means for adding said scaled squared imaginary part to said second gain value, yielding an imaginary squared sum; and

means for accumulating said imaginary squared sum, providing said second gain value.

10. The distortion compensator of claim 7 wherein said means for processing further comprises:

means for mixing said corrected real component and said compensated imaginary component with a frequency carrier, producing a first mixed signal;

means for mixing the real and imaginary signal components with a negative of said frequency carrier, producing a second mixed signal;

means for mixing said first mixed signal with said second mixed signal, resulting in a mixed real part and a mixed imaginary part;

means for scaling the mixed real part by a first loop gain constant;

means for adding said scaled mixed real part to said first gain value, yielding a real mixed sum; and

means for accumulating said real mixed sum, providing said first gain value.

11. The distortion compensator of claim 7 wherein said means for processing further comprises:

means for mixing said corrected real component and said compensated imaginary component with a frequency carrier, producing a first mixed signal;

means for mixing the real and imaginary signal components with a negative of said frequency carrier, producing a second mixed signal;

means for mixing said first mixed signal with said second mixed signal, resulting in a mixed real part and a mixed imaginary part;

means for scaling the mixed imaginary part by a second loop gain constant;

means for adding said scaled mixed imaginary part to said second gain value, yielding an imaginary mixed sum; and

means for accumulating said imaginary mixed sum, providing said second gain value.

12. A method of distortion compensation for phase and amplitude imbalance in a zero-IF downconverter processing real and imaginary signal components, comprising the steps of:

multiplying the real signal component by a first gain value, producing a corrected real component;

multiplying the real signal component by a second gain value, yielding a scaled real component;

adding said scaled real component to the imaginary signal component, providing a compensated imaginary component; and

processing said corrected real component and said compensated imaginary component to derive said first gain value and said second gain value.

13. The method of distortion compensation of claim 12 wherein said step of processing further comprises the steps of:

squaring a sum of said corrected real component and said compensated imaginary component producing a squared real part and a squared imaginary part;

scaling the squared real part by a first loop gain constant;

adding said scaled squared real part to said first gain value, yielding a real squared sum; and

accumulating said real squared sum, providing said first gain value.

14. The method of distortion compensation of claim 12 wherein said step of processing further comprises the steps of:

squaring a sum of said corrected real component and said compensated imaginary component producing a squared real part and a squared imaginary part;

scaling the squared imaginary part by a second loop gain constant;

adding said scaled squared imaginary part to said second gain value, yielding an imaginary squared sum; and

accumulating said imaginary squared sum, providing said second gain value.

15. The method of distortion compensation of claim 12 wherein said step of processing further comprises the steps of:

mixing said corrected real component and said compensated imaginary component with a frequency carrier, producing a first mixed signal;

mixing the real and imaginary signal components with a negative of said frequency carrier, producing a second mixed signal;

mixing said first mixed signal with said second mixed signal, resulting in a mixed real part and a mixed imaginary part;

scaling the mixed real part by a first loop gain constant;

adding said scaled mixed real part to said first gain value, yielding a real mixed sum; and

accumulating said real mixed sum, providing said first gain value.

16. The method of distortion compensation of claim 12 wherein said step of processing further comprises the steps of:

mixing said corrected real component and said compensated imaginary component with a frequency carrier, producing a first mixed signal;

mixing the real and imaginary signal components with a negative of said frequency carrier, producing a second mixed signal;

mixing said first mixed signal with said second mixed signal, resulting in a mixed real part and a mixed imaginary part;

scaling the mixed imaginary part by a second loop gain constant;

adding said scaled mixed imaginary part to said second gain value, yielding an imaginary mixed sum; and

accumulating said imaginary mixed sum, providing said second gain value.

17. A radio receiver employing a zero-IF downconverter, comprising:

means for converting a received signal into a real and an imaginary signal component;

a first means for processing said real and imaginary signal components to produce a gain control value;

a second means for processing said real and imaginary signal components to produce a phase control value; and

means for coupling said gain and phase control values to the zero-IF downconverter, wherein said first means for processing further comprises;

means for squaring a sum of the real and imaginary signal components, producing a squared real part and a squared imaginary part;

means for scaling the squared real part by a first loop gain constant;

means for adding said scaled squared real part to said gain control value, yielding a real squared sum; and

means for accumulating said real squared sum, providing said gain control value.

18. A radio receiver employing a zero-IF downconverter, comprising:

means for converting a received signal into a real and an imaginary signal component;

a first means for processing said real and imaginary signal components to produce a gain control value;

a second means for processing said real and imaginary signal components to produce a phase control value; and

means for coupling said gain and phase control values to the zero-IF downconverter, wherein said second means for processing further comprises;

means for squaring a sum of the real and imaginary signal components, producing a squared real part and a squared imaginary part;

means for scaling the squared imaginary part by a second loop gain constant;

means for adding said scaled squared imaginary part to said phase control value, yielding an imaginary squared sum; and

means for accumulating said imaginary squared sum, providing said phase control value.

19. A radio receiver employing a zero-IF downconverter, comprising:

means for converting a received signal into a real and an imaginary signal component;

a first means for processing said real and imaginary signal components to produce a gain control value;

a second means for processing said real and imaginary signal components to produce a phase control value; and

means for coupling said gain and phase control values to the zero-IF downconverter;

wherein said first means for processing further comprises;

means for mixing the real and imaginary signal components with a first frequency carrier, producing a first mixed signal;

means for mixing the real and imaginary signal components with a negative of said first frequency carrier, producing a second mixed signal;

means for mixing said first mixed signal with said second mixed signal, resulting in a first mixed real part and a first mixed imaginary part;

means for scaling the first mixed real part by a first loop gain constant;

means for adding said scaled first mixed real part to said gain control value, yielding a real mixed sum; and

means for accumulating said real mixed sum, providing said gain control value;

and wherein said second means for processing further comprises;

means for mixing the real and imaginary signal components with a second frequency carrier, producing a third mixed signal;

means for mixing the real and imaginary signal components with a negative of said second frequency carrier, producing a fourth mixed signal;

means for mixing said third mixed signal with said fourth mixed signal, resulting in a second mixed real part and a second mixed imaginary part;

means for scaling the second mixed imaginary part by a second loop gain constant;

means for adding said scaled second mixed imaginary part to said phase control value, yielding an imaginary mixed sum; and

means for accumulating said imaginary mixed sum, providing said phase control value.

20. A radio receiver employing a zero-IF downconverter, comprising:

means for converting a received signal into a real and an imaginary signal component;

means for multiplying said real signal component by a first gain value, producing a corrected real component;

means for multiplying said real signal component by a second gain value, yielding a scaled real component;

means for adding said scaled real component to said imaginary signal component, providing a compensated imaginary component; and

means for processing said corrected real component and said compensated imaginary component to derive said first gain value and said second gain value.

21. The radio receiver of claim 20 wherein said means for processing further comprises:

means for squaring a sum of said corrected real component and said compensated imaginary component, producing a squared real part and a squared imaginary part;

means for scaling the squared real part by a first loop gain constant;

means for adding said scaled squared real part to said first gain value, yielding a real squared sum; and

means for accumulating said real squared sum, providing said first gain value.

22. The radio receiver of claim 20 wherein said means for processing further comprises:

means for squaring a sum of said corrected real component and said compensated imaginary component, producing a squared real part and a squared imaginary part;

means for scaling the squared imaginary part by a second loop gain constant;

means for adding said scaled squared imaginary part to said second gain value, yielding an imaginary squared sum; and

means for accumulating said imaginary squared sum, providing said second gain value.

23. The radio receiver of claim 20 wherein said means for processing further comprises:

means for mixing said corrected real component and said compensated imaginary component with a frequency carrier, producing a first mixed signal;

means for mixing the real and imaginary signal components with a negative of said frequency carrier, producing a second mixed signal;

means for mixing said first mixed signal with said second mixed signal, resulting in a mixed real part and a mixed imaginary part;

means for scaling the mixed real part by a first loop gain constant;

means for adding said scaled mixed real part to said first gain value, yielding a real mixed sum; and

means for accumulating said real mixed sum, providing said first gain value.

24. The radio receiver of claim 20 wherein said means for processing further comprises:

means for mixing said corrected real component and said compensated imaginary component with a frequency carrier, producing a first mixed signal;

means for mixing the real and imaginary signal components with a negative of said frequency carrier, producing a second mixed signal;

means for mixing said first mixed signal with said second mixed signal, resulting in a mixed real part and a mixed imaginary part;

means for scaling the mixed imaginary part by a second loop gain constant;

means for adding said scaled mixed imaginary part to said second gain value, yielding an imaginary mixed sum; and

means for accumulating said imaginary mixed sum, providing said second gain value.