Fabrication methods for silicon/glass capacitive absolute pressure sensors

• US 5,264,075 A
• Filed: 11/06/1992
• Issued: 11/23/1993
• Est. Priority Date: 11/06/1992
• Status: Expired due to Fees

• Current Assignee: University of Michigan
• Original Assignee: Ford Motor Company
• Inventors: Sooriakumar, Kathirgamasundaram, Parsons, Michael H., Zanini-Fisher, Margherita, Haeberle, Russell J., McCarthy, Shaun L.
• Primary Examiner(s): Powell, William A.
• Application Number:
  US07/972,688
• Time in Patent Office: 382 Days
• Field of Search: 156/633, 156/634, 156/643, 156/647, 156/651, 156/653, 156/656, 156/657, 156/659.1, 156/661.1, 156/662, 361/283, 361/405, 73/718, 73/724, 357/26, 29/25.41, 437/226, 437/228, 437/238, 437/241, 437/245
• US Class Current: 438/53
• CPC Class Codes: G01L 9/0073 using a semiconductive diaphragm

Abstract

A method for making pressure sensors is disclosed. A wafer of doped silicon or other semiconductive material is selectively chemically etched (micromachined) on both sides to form a plurality of diaphragms, a thicker silicon rim surrounding each diaphragm, and a feedthrough hole corresponding to each diaphragm external to the silicon rim. A small metallized area of the upper surface of the silicon substrate on the rim adjacent each diaphragm permits external electrical connection to the silicon plate. Capacitor plates are formed by depositing a metallized film or other conductive material on a dielectric substrate in locations corresponding to the diaphragms of the silicon wafer. To permit external electrical connection to the conductive material, contact pads electrically connected to the conductive material are formed on the dielectric substrate external to the area corresponding to the diaphragms. A buffer layer of nonconductive material is disposed over the entire dielectric substrate, and then selectively removed from the contact pads. The lower surface of the silicon substrate is joined to the dielectric substrate, such that the diaphragms formed in the semiconductor material are in alignment with the conductive areas of the dielectric substrate and the contact pads on the dielectric substrate are in alignment with the feedthrough holes in the silicon wafer. The resulting assembly comprises a plurality of electric capacitors and may be cut into individual capacitive pressure sensors.

Claims

1. A method for fabricating a capacitive absolute pressure sensor comprising the steps of:

(A) preparing an electrically conductive semiconductor substrate from a wafer having an upper surface and a lower surface and comprising a diaphragm, means for electrically connecting the semiconductor substrate to an external electrical circuit, and means electrically isolated from the semiconductor substrate wafer for connecting the external electrical circuit to a capacitor plate on a dielectric substrate;

(B) preparing said dielectric substrate by disposing a metal capacitor plate and means for connecting the metal capacitor plate to the external electrical circuit upon an upper surface of said dielectric substrate, and by covering the upper surface of the dielectric substrate, including said metal capacitor plate and said means for connecting the metal capacitor plate to the external electrical circuit, but excluding an area adjacent the means for connecting the metal capacitor plate to the external electrical circuit, with a buffer layer of nonconductive material; and

,

(C) joining the semiconductor substrate to the dielectric substrate such that a capacitive chamber is formed between the diaphragm of the semiconductor substrate and the metal capacitor plate of the dielectric substrate, and such that a hermetic seal is formed between said diaphragm and said metal capacitor plate.

2. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the diaphragm is formed by selectively removing material from both sides of the semiconductor substrate within a surrounding rim.

3. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the means for electrically connecting the semiconductor substrate to an external electrical circuit is a metallized area formed on the upper surface of the semiconductor substrate.

4. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the means electrically isolated from the semiconductor substrate material for connecting said external electrical circuit to a dielectric substrate is a feedthrough communicating between the upper surface of the semiconductor substrate and the dielectric substrate.

5. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein:

said diaphragm is formed by selectively removing material from both sides of the semiconductor substrate within a surrounding rim;

said means for electrically connecting the semiconductor substrate to an external electrical circuit is a metallized area formed on the upper surface of the semiconductor substrate; and

,

said means electrically isolated from the semiconductor substrate material for connecting said external electrical circuit to a dielectric substrate is a feedthrough communicating between the upper surface of the semiconductor substrate and the dielectric substrate.

6. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the semiconductor substrate is prepared by depositing passivation layers of silicon nitride on the upper and lower surfaces of the semiconductor substrate, by selectively removing the passivation layers from the areas of the semiconductor substrate at which a feedthrough corresponding to a contact pad of the dielectric substrate and a diaphragm corresponding to the metal capacitor plate of the dielectric substrate are to be formed, by selectively removing additional silicon nitride from only the lower surface of the semiconductor substrate to reduce the thickness of the passivation layer by one half within a cavity area corresponding to the diaphragm, by removing semiconductor substrate material from the unmasked areas of the semiconductor substrate to reduce the diaphragm area to a thickness equal to the desired final thickness of the diaphragm plus twice the depth of the cavity to be formed between the diaphragm and the dielectric substrate, by forming the said feedthrough, corresponding to the contact pad on the dielectric substrate and communicating between the upper and lower surfaces of the semiconductor substrate, by reducing the thickness of the passivation layer on the lower surface of the silicon substrate until the passivation is completely removed from the cavity area, by removing additional semiconductor substrate material from the unmasked upper and lower surfaces of the semiconductor substrate to reduce the upper and lower surfaces of the diaphragm until the desired cavity depth is obtained, thereby forming a cavity in the lower surface of the silicon substrate, by stripping the remaining passivation from the silicon substrate, and by forming a metallized area on the rim associated with the diaphragm on the upper surface of the silicon substrate by evaporation of aluminum through a shadow mask.

7. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the means for connecting the metal capacitor plate to an external electrical circuit is formed by the same means as the metal capacitor plate is formed.

8. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the buffer layer comprises PECVD silicon oxide or sputtered pyrex (borosilicate).

9. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the metal capacitor plate is formed by the deposition and selective removal of a layer of metal on the surface of the dielectric substrate.

10. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the said metal capacitor plate and the said means for electrically connecting the metal capacitor plate to an external electrical circuit are formed by depositing a layer of metal on the said upper surface of the dielectric substrate and selectively removing said metal such that the remaining metal comprises a capacitor plate, a base adapted to connect the capacitor plate to an external electrical circuit, and an electrically conductive interconnect between the base and the capacitor plate.

11. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the dielectric substrate is prepared by a series of steps comprising:

(A) metallizing an upper surface of the dielectric substrate,

(B) selectively removing the metal layer using a photoresist and chemical etching to form a capacitor plate, a base for a contact pad associated with the capacitor plate and an interconnect electrically connecting the base to the capacitor plate,

(C) depositing, prior to removal of the photoresist, a silicon oxide layer of thickness equal to that of the metal layer over the entire surface of the substrate,

(D) removing the photoresist,

(E) forming a contact pad upon the base,

(F) depositing a buffer layer of silicon oxide over the entire surface of the glass substrate; and

,

(G) removing the silicon oxide from over at least a portion of the contact pad.

12. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the dielectric substrate is prepared by a series of steps comprising:

(A) metallizing an upper surface of the glass substrate by electron beam evaporation of a chromium layer 1000Å

-2000Å

thick;

(B) selectively removing the chromium layer using a lithographic photoresist and chemical etching to form a plurality of capacitor plates, a base for a contact pad associated with each capacitor plate and an interconnect electrically connecting each base to each associated capacitor plate;

(C) depositing, after the etching and prior to removal of the photoresist, a silicon oxide layer of thickness equal to that of the chromium layer over the entire surface of the substrate;

(D) removing the lithographic photoresist;

(E) forming by electron beam evaporation a contact pad upon each base comprising a thin chromium layer and an aluminum layer approximately 5000Å

thick;

(F) depositing a buffer layer of silicon oxide over the entire surface of the glass substrate; and

,

(G) removing the silicon oxide from over at least a portion of each contact pad.

13. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the step (B) further comprises a first step of forming a continuous trench comprising the locations of the capacitor plate, base and interconnect within the upper surface of the dielectric substrate, and wherein the thickness of the layer of metal deposited on the upper surface of the dielectric substrate is equal to the depth of said continuous trench.

14. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the dielectric substrate is prepared by a series of steps comprising:

(1) forming a continuous trench comprising the locations of the metal capacitor plate, a base and an interconnect within the upper surface of the dielectric substrate;

(2) metallizing said upper surface of the dielectric substrate;

(3) selectively removing the metal layer to form the metal capacitor plate, the said base for a contact pad associated with the capacitor plate and the said interconnect electrically connecting the base to the capacitor plate;

(4) forming a contact pad upon the said base;

(5) depositing a buffer layer of silicon oxide over the entire surface of the glass substrate; and

,

(6) removing the silicon oxide from over at least a portion of the contact pad.

15. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the dielectric substrate is prepared by a series of steps comprising:

(A) forming a continuous trench approximately 1000Å

-2000Å

deep comprising the locations of the metal capacitor plate, a base and an interconnect within the upper surface of the dielectric substrate;

(B) metallizing said upper surface of the glass substrate by electron beam evaporation of a chromium layer of thickness equal to the depth of said trench;

(C) selectively removing the chromium layer using a lithographic photoresist and chemical etching process to form a plurality of metal capacitor plates, a base for a contact pad associated with each capacitor plate and an interconnect electrically connecting each base to each associated capacitor plate;

(D) forming by electron beam evaporation a contact pad upon each base comprising a thin chromium layer and an aluminum layer approximately 5000Å

thick;

(E) depositing a buffer layer of silicon oxide over the entire surface of the glass substrate; and

,

(F) removing the silicon oxide from over at least a portion of each contact pad.

16. The method for fabricating a capacitive absolute pressure sensor of claim 1 wherein the semiconductor substrate is joined to the dielectric substrate by anodic bonding between the semiconductor substrate and the buffer layer of the dielectric substrate.

17. The method for fabricating a capacitive absolute pressure sensor of claim 16 wherein the anodic bond between the semiconductor substrate and the buffer layer of the dielectric substrate is effected by heating and applying a voltage across the semiconductor substrate and the dielectric substrate.

18. A batch manufacturing method for fabricating a plurality of capacitive absolute pressure sensors comprising the steps of:

(A) fabrication of a glass substrate by metallizing an upper surface of the glass substrate by electron beam evaporation of a chromium layer 1000Å

-2000Å

thick, by selectively removing the chromium layer using a lithographic photoresist and chemical etching to form a plurality of capacitor plates, a base for a contact pad associated with each capacitor plate and an interconnect electrically connecting each base to each associated capacitor plate, by depositing, after the etching and prior to removal of the photoresist, a silicon oxide layer of thickness equal to that of the chromium layer over the entire surface of the substrate, by removing the lithographic photoresist, by forming by electron beam evaporation a contact pad upon each base comprising a thin chromium layer and an aluminum layer approximately 5000Å

thick, by depositing a buffer layer of silicon oxide over the entire surface of the glass substrate; and

by removing the silicon oxide from over at least a portion of each contact pad;

(B) fabrication of a silicon substrate having an upper surface and a lower surface by depositing passivation layers approximately 1000Å

thick on the upper and lower surfaces of the silicon substrate, by selectively removing the passivation layers by double-sided lithography and plasma etching from the areas of the silicon substrate at which a feedthrough corresponding to each contact pad of the glass substrate and a diaphragm corresponding to each capacitor plate of the glass substrate are to be formed, by performing a second photolithographic plasma etch to only the lower surface of the silicon substrate to reduce the thickness of the passivation layer by one half within a cavity area corresponding to each diaphragm, by performing a first timed etch to reduce the silicon in each diaphragm area to a thickness equal to the desired final thickness of the diaphragm plus twice the depth of the cavity to be formed between the diaphragm and the glass substrate and to form a feedthrough, corresponding to each contact pad on the glass substrate, communicating between the upper and lower surfaces of the silicon substrate, by performing a timed plasma etch to reduce the thickness of the passivation layer on the lower surface of the silicon substrate until the passivation is completely removed from each cavity area, by performing a second timed etch to reduce the upper and lower surfaces of each diaphragm until the desired cavity depth is obtained, thereby forming a plurality of cavities in the lower surface of the silicon substrate, by stripping the remaining passivation from the silicon substrate, and by forming a metallized area on the rim associated with each diaphragm on the upper surface of the silicon substrate by evaporation of aluminum through a shadow mask;

(C) alignment of the silicon substrate and the glass substrate such that each capacitor plate of the glass substrate corresponds to a diaphragm of the silicon substrate, and such that each feedthrough in the silicon substrate communicates to a contact pad on the glass substrate;

(D) joinder of the assembled substrates by heating in a vacuum chamber to a temperature of approximately 400°

C. and applying a voltage of 300-500 V until an anodic bond is formed between the silicon substrate and the buffer layer of the glass substrate; and

,

(E) separating the individual capacitive absolute pressure sensors from the bonded assembly.

19. A batch manufacturing method for fabricating a plurality of capacitive absolute pressure sensor assemblies comprising the steps of:

(A) fabrication of a dielectric substrate by forming a plurality of continuous trenches approximately 1000Å

-2000Å

deep, each trench comprising the locations of a capacitor plate, a base for a contact pad associated with each capacitor plate and an interconnect adapted to electrically connect each base to each associated capacitor plate, within an upper surface of the dielectric substrate, by metallizing said upper surface of the dielectric substrate by electron beam evaporation with a chromium layer of thickness equal to the depth of the trenches, by selectively removing the chromium layer to form in each trench capacitor plates, a base for a contact pad associated with each capacitor plate and an interconnect electrically connecting each base to each associated capacitor plate, by forming by electron beam evaporation a contact pad upon each base, the contact pad comprising a thin chromium layer and an aluminum layer approximately 5000Å

thick, by depositing a buffer layer of silicon oxide over the entire surface of the dielectric substrate; and

by removing the silicon oxide from over at least a portion of each contact pad;

(B) fabrication of a silicon substrate from a doped silicon wafer by depositing passivation layers approximately 1000Å

thick on an upper and a lower surface of the wafer, by selectively removing the passivation layers by double-sided lithography and plasma etching from the areas of the silicon substrate at which a feedthrough corresponding to each contact pad of the dielectric substrate and a diaphragm corresponding to each capacitor plate of the dielectric substrate are to be formed, by performing a second photolithographic plasma etch process to only the lower surface of the silicon substrate to reduce the thickness of the passivation layer by one half within a cavity area corresponding to each diaphragm, by performing a first timed etch to reduce the silicon in each diaphragm area to a thickness equal to a desired final diaphragm thickness plus twice the depth of the cavity to be formed between the diaphragm and the dielectric substrate and to form said feedthroughs, communicating between the upper and lower surfaces of the silicon substrate, by performing a timed plasma etch to reduce the thickness of the passivation layer on the lower surface of the silicon substrate until the passivation is completely removed from each cavity area, by performing a second timed etch to reduce the upper and lower surfaces of each diaphragm until the desired cavity depth is obtained, thereby forming a plurality of cavities in the lower surface of the silicon substrate, by stripping the remaining passivation from the silicon substrate, and by forming a metallized area adjacent each diaphragm on the upper surface of the silicon substrate by evaporation of aluminum through a shadow mask;

(C) alignment of the silicon substrate and the dielectric substrate such that each capacitor plate of the dielectric substrate registers with a corresponding diaphragm of the silicon substrate, and such that each feedthrough in the silicon substrate communicates to a corresponding contact pad on the dielectric substrate;

(D) joinder of the assembled substrates by heating in a vacuum chamber to a temperature of approximately 400°

C. and applying a voltage of 300-500 V until an anodic bond is formed between the silicon substrate and the buffer layer of the dielectric substrate; and

,

(E) separating the individual capacitive absolute pressure sensors from the bonded assembly.