Semiconductor package having programmable interconnect

• US 5,264,729 A
• Filed: 07/29/1992
• Issued: 11/23/1993
• Est. Priority Date: 07/29/1992
• Status: Expired due to Fees

• Current Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Chang, Yin, Rostoker, Michael D.
• Primary Examiner(s): Mintel, William
• Assistant Examiner(s): OSTROWSKI, DAVID M
• Application Number:
  US07/921,806
• Time in Patent Office: 482 Days
• Field of Search: 257/529, 257/530, 257/700, 257/774, 257/693, 361/395, 361/397, 361/404, 361/406, 361/409, 361/410
• US Class Current: 257/774
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/525 with adaptable interconnections
• CPC Class Codes: H01L 23/5382 Adaptable interconnections, e.g. for engineering changes
• CPC Class Codes: H01L 27/118 Masterslice integrated circuits
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/15312 being a pin array, e.g. PGA

Abstract

A semiconductor package is described which has external connection points (pins, pads, etc.) which may be configured from outside of the package. In one embodiment, this is accomplished with programming holes which pass through and form contact surfaces with various conductors within the package. Conductive material is then deposited into selected holes, forming connections between all of the contact surfaces in any hole. In another embodiment, configurability is accomplished via conductive pads disposed on the exterior surface of the package. Conductive jumpers are then used to connect selected pads. An auxiliary externally effected power plane and bus-bar structure are also described.

Claims

1. A configurable semiconductor package allowing a user to direct signals from a die within the package to selected terminals disposed on an exterior surface of the package, comprising:

a multi-layer package body having alternating at least one layer each of conductive traces and insulating material, and having terminals disposed on a first exterior surface of the package body;

wherein;

a first of the alternating layers is a layer of conductive traces within the package body, and has points at the ends of the first conductive traces for connecting to a semiconductor die mounted in an opening within the package body;

a second of the alternating layers is a layer of second conductive traces within the package body;

a third of the alternating layers is a layer of insulating material within the package body separating the first layer from the second layer;

further comprising;

conductive vias disposed within the package body and extending between the second conductive traces and the terminals;

holes extending from a second exterior surface of the package, opposite the first exterior surface of the package body, extending into the package body, and communicating with corresponding ones of the first and second conductive traces of the first and second layer, respectively;

means, disposed in the holes, within the package body, for configurably connecting selected ones of the first conductive traces to selected ones of the second conductive traces in order that a user may direct signals between a selected one of the die-connecting points and a selected one of the package terminals.

2. A package, according to claim 1, wherein:

the means for configurably connecting a selected one of the first conductive traces to a selected corresponding one of the second conductive traces is a pin insertable into the hole.

3. A package, according to claim 1, wherein:

the means for configurably connecting a selected one of the first conductive traces to a selected corresponding one of the second conductive traces is a pin insertable into the hole and coated with a conductive material.

4. A package, according to claim 3, wherein:

the conductive material is solder.

5. A package, according to claim 3, wherein:

the conductive material is epoxy.

6. A package, according to claim 1, wherein:

the means for configurably connecting a selected one of the first conductive traces to a selected corresponding one of the second conductive traces is a conductive material deposited into the hole.

7. A package, according to claim 6, wherein:

the conductive material is solder.

8. A package, according to claim 6, wherein:

the conductive material is epoxy.

9. A package, according to claim 1, wherein:

the means for configurably connecting selected ones of the first conductive traces to selected corresponding selected one of the second conductive traces is a bus bar having a plurality of pins insertable into a like plurality of holes.

10. A package, according to claim 9, wherein:

the pins are coated with a conductive material.

11. A package, according to claim 10, wherein:

the conductive material is solder.

12. A package, according to claim 10, wherein:

the conductive material is epoxy.