Wordline driver circuit for EEPROM memory cell
First Claim
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1. A circuit for applying voltages to a wordline in a floating-gate memory cell array, comprising;
- a first voltage supply circuit for supplying at least a first voltage to a first node;
a second voltage supply circuit for supplying at least a second voltage to a second node;
a third voltage supply circuit for selectively supplying a third voltage to the wordline;
a switching circuit for selectively coupling one of said first voltage supply circuit and said second voltage supply circuit to an output node, the switching circuit including an inverter having a first transistor and a second transistor with current paths connected in series between said first node and said second node, the output node connected between the current paths of said first transistor and said second transistor; and
a first isolating transistor having a current path coupled between said output node and the wordline for isolating the switching circuit from the wordline when said third voltage supply circuit supplies said third voltage to the wordline, said first isolating transistor has a substrate coupled to said first node.
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Abstract
A circuit for applying reading, programming and erasing voltages to a wordline in a floating-gate-type EEPROM cell array comprising a positive voltage switching circuit, a first isolating transistor, and a second isolating transistor. The positive voltage switching circuit may include an inverter with feedback transistor and a third isolating transistor. In one embodiment, the positive voltage switching circuit is capable of switching up to three positive voltage values and reference voltage to the wordline terminal.
54 Citations
19 Claims
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1. A circuit for applying voltages to a wordline in a floating-gate memory cell array, comprising;
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a first voltage supply circuit for supplying at least a first voltage to a first node; a second voltage supply circuit for supplying at least a second voltage to a second node; a third voltage supply circuit for selectively supplying a third voltage to the wordline; a switching circuit for selectively coupling one of said first voltage supply circuit and said second voltage supply circuit to an output node, the switching circuit including an inverter having a first transistor and a second transistor with current paths connected in series between said first node and said second node, the output node connected between the current paths of said first transistor and said second transistor; and a first isolating transistor having a current path coupled between said output node and the wordline for isolating the switching circuit from the wordline when said third voltage supply circuit supplies said third voltage to the wordline, said first isolating transistor has a substrate coupled to said first node. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification