Nonvolatile memory card with a single power supply input

• US 5,267,218 A
• Filed: 03/31/1992
• Issued: 11/30/1993
• Est. Priority Date: 03/31/1992
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Elbert, Dale K.
• Primary Examiner(s): Fears, Terrell W.
• Application Number:
  US07/861,378
• Time in Patent Office: 609 Days
• Field of Search: 365/52, 365/174, 365/182, 365/189.01, 365/230.01, 365/226, 365/227, 365/229, 365/900
• US Class Current: 365/185.04
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
• CPC Class Codes: G11C 16/30 Power supply circuits
• CPC Class Codes: G11C 5/00 Details of stores covered by group G11C11/00
• CPC Class Codes: G11C 5/143 Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels G11C5/148 takes precedence; Switching between alternative supplies G11C5/141 takes precedence

Abstract

A nonvolatile memory card is described. The nonvolatile memory card includes a plurality of memories arranged in an array. Each of the plurality memories includes memory cells that are electrically programmable and electrically erasable. Each of the plurality of memories requires a device power supply voltage and a reprogramming voltage. The memory card also includes the device power supply input for receiving a power supply voltage for the memory card, and voltage conversion means coupled to receive the device power supply voltage at the power supply input for providing the device power supply voltage to the plurality of memories and for generating the reprogramming voltage for erasing and programming the plurality of memories. The voltage conversion means further includes (1) a charge pump coupled to the power supply input for generating the reprogramming voltage for erasing and programming the plurality of memories, and (2) a control logic coupled to the charge pump for allowing the charge pump to generate the reprogramming voltage. The control logic causes the charge pump not to generate the reprogramming voltage when the memory card does not require a reprogramming operation in order to protect data integrity of the memory card. When the memory card requires a reprogramming operation, the control logic causes the charge pump to generate the reprogramming voltage.

Claims

1. A nonvolatile memory card, comprising:

(A) a plurality of memories arranged in an array, wherein each of the plurality memories includes memory cells that are electrically programmable and electrically erasable, wherein each of the plurality of memories requires a device power supply voltage and a reprogramming voltage;

(B) a power supply input for receiving the device power supply voltage for the memory card; and

(C) voltage conversion means coupled to receive the device power supply voltage at the power supply input for providing the device power supply voltage to the plurality of memories and for generating the reprogramming voltage for erasing and programming the plurality of memories, wherein the voltage conversion means further comprises;

(i) a charge pump coupled to the power supply input for generating the reprogramming voltage for erasing and programming the plurality of memories; and

(ii) a control logic coupled to the charge pump for allowing the charge pump to generate the reprogramming voltage, wherein the control logic causes the charge pump not to generate the reprogramming voltage when the memory card does not require a reprogramming operation in order to protect data integrity of the memory card, wherein when the memory card requires a reprogramming operation, the control logic causes the charge pump to generate the reprogramming voltage.

2. The memory card of claim 1, wherein the reprogramming voltage is approximately 12 volts, the power supply voltage is approximately 5 volts.

3. The memory card of claim 1, wherein the charge pump is a capacitive voltage charge pump.

4. The memory card of claim 1, wherein the charge pump is an inductive voltage charge pump circuit.

5. The memory card of claim 1, wherein the charge pump further comprises a first switching transistor for coupling the reprogramming voltage to the plurality of memories of the memory card, wherein the first switching transistor has a gate coupled to the control logic, wherein the control logic controls on and off of the first switching transistor.

6. The memory card of claim 5, wherein the voltage conversion circuit further comprises a high voltage detector for detecting voltage level of the output of the voltage charge pump, wherein the high voltage detector is also coupled to the control logic, wherein when the voltage charge pump does not provide the reprogramming voltage, the high voltage detector informs the control logic to switch off the first switching transistor.

7. The memory card of claim 6, wherein the voltage conversion means further comprises a second switching transistor for coupling the power supply voltage at the power supply input to each of the memories, wherein the second switching transistor has a gate coupled to the control logic, wherein the control logic controls on and off of the second switching transistor.

8. The memory card of claim 7, wherein the high voltage detector is also coupled to the power supply input, wherein the high voltage detector detects if the power supply input receives the reprogramming voltage, and if so, informs the control logic to switch off the second switching transistor.

9. The memory card of claim 1, wherein the reprogramming voltage is approximately 12 volts, the power supply voltage is approximately 3 volts.

10. The memory card of claim 4, wherein the inductive voltage charge pump includes a surface mount inductor on the voltage charge pump circuit.

11. The memory card of claim 10, wherein the inductor is a swirled trace sandwiched by ferrite material in order to avoid occupying large space on the voltage charge pump circuit. d