Circuit for generating M-sequence pseudo-random pattern
First Claim
1. A MRP (M-sequence random pattern) generator circuit which comprises m MRP pattern generating circuits, each comprising a shift register and an EXOR gate as a feedback loop of the shift register, the m MRP pattern generating circuits being connected in parallel at their outputs and the time relation between said outputs of the m MRP pattern generating circuits, on an assumption that the pattern cycle of each of the MRP generating circuits is 360 degrees, being set at Δ
- θ
=360/m and initial values for the m MRP pattern generating circuits being sequentially distanced by Δ
θ
from one to the next,wherein each said shift register is connected to a set circuit for setting the initial value for each said shift register, each said register contains a plurality of flip-flops, said EXOR gate is connected to selected ones of the outputs of the flip-flops, said set circuit is connected to a selected one of the inputs of a plurality of OR gates connected to set inputs of said flip-flops and said flip-flops are connected to the other inputs of the OR gates, the OR gates being connected at their outputs to subsequent flip-flops.
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Abstract
The present invention provides a MRP generator comprising m MRP generating circuits connected in parallel which are operated at a 1/m clock speed and have a predetermined time relation to each other, wherein the MRP generating circuits are operated on the multiplex basis. The operating speed is improved.
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Citations
2 Claims
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1. A MRP (M-sequence random pattern) generator circuit which comprises m MRP pattern generating circuits, each comprising a shift register and an EXOR gate as a feedback loop of the shift register, the m MRP pattern generating circuits being connected in parallel at their outputs and the time relation between said outputs of the m MRP pattern generating circuits, on an assumption that the pattern cycle of each of the MRP generating circuits is 360 degrees, being set at Δ
- θ
=360/m and initial values for the m MRP pattern generating circuits being sequentially distanced by Δ
θ
from one to the next,wherein each said shift register is connected to a set circuit for setting the initial value for each said shift register, each said register contains a plurality of flip-flops, said EXOR gate is connected to selected ones of the outputs of the flip-flops, said set circuit is connected to a selected one of the inputs of a plurality of OR gates connected to set inputs of said flip-flops and said flip-flops are connected to the other inputs of the OR gates, the OR gates being connected at their outputs to subsequent flip-flops. - View Dependent Claims (2)
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Specification
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- Resources
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Current AssigneeAndo Electric Co., Ltd. (Yokogawa Electric Corporation)
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Original AssigneeAndo Electric Co., Ltd. (Yokogawa Electric Corporation)
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InventorsWatanabe, Hirobumi, Nagai, Hiroshi
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Primary Examiner(s)Heyman, John S.
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Application NumberUS07/938,572Time in Patent Office463 DaysField of Search377/33, 377/34, 377/72, 377/67, 331/78, 364/717US Class Current377/33CPC Class CodesH03K 3/84 Generating pulses having a ...
