Sure chip plus

• US 5,270,898 A
• Filed: 12/28/1990
• Issued: 12/14/1993
• Est. Priority Date: 12/28/1990
• Status: Expired due to Term

• Current Assignee: Westinghouse Electric Company LLC (Brookfield Asset Management Incorporated)
• Original Assignee: Westinghouse Electric Company LLC (Brookfield Asset Management Incorporated)
• Inventors: Murphy, William J., Elms, Robert T., Engel, Joseph C., Schlotterer, John C.
• Primary Examiner(s): DEBOER, TODD
• Application Number:
  US07/636,634
• Time in Patent Office: 1,082 Days
• Field of Search: 361/93-94, 361/95, 361/96, 364/483
• US Class Current: 361/96
• CPC Class Codes: G06J 1/00 Hybrid computing arrangements digitally-programmed analogue computers G06G7/06
• CPC Class Codes: H02H 6/005 using digital thermal images

Abstract

A hybrid monolithic IC that is standardized for controlling various types of electrical equipment, such as circuit breakers, motor controllers and the like. The IC is a hybrid monolithic IC, fabricated in CMOS technology, The shortcomings of utilizing CMOS technology for linear or analog circuitry is overcome by the implementation of the IC to provide a monolithic IC that is relatively less expensive than using multiple ICs or a single IC fabricated from biCMOS technology.

Claims

1. A CMOS monolithic circuit for communicating over a communications network comprising:

an analog subsystem including means for receiving analog signals;

a digital subsystem including means for receiving digital message signals comprised of a predetermined number of serial bits and including an instruction portion and an address portion;

processor means for producing digital output signals responsive to said analog subsystem or said digital subsystem; and

means for transmitting said digital output signals over said communications network, and including means for transmitting a predetermined digital message over said communication network in response to a preselected instruction portion of a received message signal independently of said processor means.

2. A CMOS monolithic circuit as recited in claim 1, further including means for storing said predetermined digital message formulated by said processor means for transmission by said means for transmitting in response to said preselected instruction portion.

3. The CMOS monolithic circuit as recited in claim 2, wherein said predetermined message comprises a status message and said processor means periodically update said status message and places it in said means for storing said predetermined message for transmission over said communication network in response to said preselected instruction portion of said received message independent of said processor means.

4. A device which includes a CMOS monolithic circuit for monitoring analog signals from an electrical device having an operate mode and a trip mode and generating an output signal and communication said output signal over a predetermined communications network, said CMOS monolithic circuit comprising:

means for receiving analog signals;

processor means for generating digital output signals as a function of said analog signals and including a digital status signal indicating a status of said device; and

means for communicating said digital output signals over a predetermined communications network, and including means for storing said digital status signal generated by said processor means and transmitting the stored digital status signal over the predetermined communication network independent of said processor means in response to a message received over said predetermined communications network having a preselected instruction portion.

5. A device as recited in claim 4, wherein said analog signals are electrical currents.

6. A device as recited in claim 4, wherein said analog signals are electrical voltages.

7. A device as recited in claim 4, further including means for displaying such said output signal.

8. A device as recited in claim 4, further including means for controlling said electrical device as a function of said output signal.

9. A device as recited in claim 4, further including means for displaying said output signal and controlling said electrical device as a function of said output signal.

10. A device as recited claim 4, wherein said controlling means includes means for initiating a trip of said electrical device under predetermined conditions.

11. A device as recited in claim 10, wherein said predetermined conditions include overcurrent.