Method and apparatus for rate-responsive cardiac pacing

• US 5,271,395 A
• Filed: 04/17/1992
• Issued: 12/21/1993
• Est. Priority Date: 04/17/1992
• Status: Expired due to Term

• Current Assignee: Medtronic Incorporated (Medtronic Plc)
• Original Assignee: Medtronic Incorporated (Medtronic Plc)
• Inventors: Greeninger, Daniel R., Wahlstrand, John D., Borgerding, Girard B., Baxter, Daniel J.
• Primary Examiner(s): Kamm, William E.
• Assistant Examiner(s): SCHAETZLE, KENNEDY
• Application Number:
  US07/870,062
• Time in Patent Office: 613 Days
• Field of Search: 128/419 PG, 128/734
• US Class Current: 607/9
• CPC Class Codes: A61N 1/36585 controlled by two or more physical parameters

Abstract

A rate-responsive cardiac pacemaker comprising a minute ventilation circuit and an activity circuit. The minute ventilation circuit computes a first target pacing rate as a function of measurements of the patient'"'"'s pleural blood impedance, and the activity circuit computes a second target pacing rate as a function of measured levels of patient activity. A rate control function establishes a rate-responsive pacing rate based on the first and second target pacing rates. The minute ventilation circuit delta-modulates an analog impedance waveform and maintains short-term and long-term weighted averages of delta-modulator output counts. Variations in the difference between the short-term and long-term weighted average values are determinative of the first target pacing rate. Variations in an activity sensor output signal are determinative of the second target pacing rate. Physician-programmable parameters for the pacemaker include selection of a rate-response setting, upper and lower pacing rate limits, and rate-smoothing attack and decay settings.

Claims

1. A pacemaker, enclosed within a housing, comprising:

a rate control circuit;

a pulse generator adapted to be coupled to a patient'"'"'s heart via a cardiac lead, and coupled to said rate control circuit, said pulse generator responsive to a triggering signal from said rate control circuit to generate a pacing pulse;

said rate control circuit having means for producing triggering signals at a rate varying between predetermined upper and lower pacing rates;

an activity sensor adapted to be coupled to said patient, producing an output signal indicative of patient activity;

a Δ

Z processor;

an impedance circuit, adapted to be coupled to said heart via said cardiac lead and coupled to said Δ

Z processor, said impedance circuit producing an impedance voltage waveform corresponding to changes in impedance in said heart;

said Δ

Z processor having sampling means for periodically sampling said impedance voltage waveform and further having means for producing a serial bit stream output signal in response to each said sample, the number of logical `1` bits (hereinafter referred to as `counts`) in said bit stream output signal corresponding to a change in said impedance voltage waveform;

said rate control circuit receiving said bit stream output signal, and having counting means responsive to said bit stream output signal to count said counts occurring during a plurality of successive two-second intervals and having calculating means to calculate the following values;

LTA (Long-Term Average);

an average count, over a predetermined long-term interval, of said counts occurring in each two-second portion of said long-term interval;

LSTA (Limited Short-Term Average);

an average count, over a predetermined short-term interval, of said counts occurring in each two-second portion of said short-term interval, where said rate control circuit constrains said LSTA value to a range determined by said predetermined upper and lower pacing rates;

DZ (Limited Positive Difference);

a value representing a comparison of LSTA and LTA, defined as ##EQU14## where DZ_mm is a predefined upper limit on said DZ value and where said rate control circuit producing triggering pulses at a rate determined as a function of said DZ value.

2. A method of pacing a patient'"'"'s heart, comprising the steps of:

(a) producing an impedance waveform corresponding to changes in impedance in said heart;

(b) delta-modulating said impedance waveform at a predetermined sampling rate to produce a serial output bit stream, such that for first and second successive samples, said output bit stream after said second sample comprises a sequence of N logical `1` bits (hereinafter referred to as `counts`), where N reflects a change in said impedance waveform between said first and second samples;

(c) computing an LTA (Long-Term Average) value representing an average count, over a predetermined long-term interval, of counts occurring during each two-second portions of said long-term interval;

(d) computing an LSTA (Limited Short-Term Average) value representing an average count, over a predetermined short-term interval, of counts occurring in each two-second portion of said short term interval;

(e) computing a DZ (Limited Positive Difference) value, representing a comparison of said LTA and said LSTA values, according to the formula ##EQU15## where DZ_mm is a predefined upper limit on said DZ value;

(f) delivering cardiac pacing pulses to said heart at a rate determined as a function of said DZ value.

3. The method of claim 2 further comprising:

(a) initializing said DZ (Limited Positive Difference) value to zero; and

(b) initializing said pacing rate to a lower rate (LR).

4. The method of claim 3 further comprising:

(a) energizing a delta-modulator for a predetermined loading period; and

(b) loading output counts during said loading period from said delta-modulator into said LTA (Long-Term Average) value and into said LSTA (Limited Short-Term Average) value.

5. The method of claim 4 further comprising:

(a) interrogating said LTA (Long-Term Average) value with a programmer; and

(b) calculating an analog gain range value for said delta-modulator.

6. The method of claim 5 further comprising:

(a) setting gain range value to a first gain range if said LTA value is less than or equal to a mid-range value of said delta-modulator counts; and

(b) setting said gain range value to a second gain range if said LTA value is greater than a mid-range value of said delta-modulator counts, said second gain range being a greater gain range value than said first gain range.

7. The method of claim 6 further comprising:

adjusting said gain range value to a third gain range if said LTA value is greater than a mid-range value determined after said gain range value has been set at said second gain range, said third gain range being a greater range value than said second gain range.

8. The method of claim 7 further comprising:

adjusting said gain range value to a fourth gain range if said LTA value is greater than a mid-range value determined after said gain range value has been set at said third gain range, said fourth gain range being a greater range value than said third gain range.

9. A pacemaker, enclosed within a housing, comprising:

a rate control circuit;

a pulse generator adapted to be coupled to a patient'"'"'s heart via a cardiac lead, and coupled to said rate control circuit, said pulse generator responsive to a triggering signal from said rate control circuit to generate a pacing pulse;

said rate control circuit having means for producing triggering signals at a rate varying between predetermined upper and lower pacing rates;

an activity sensor adapted to be coupled to said patient, producing an output signal indicative of patient activity;

a Δ

Z processor;

an impedance circuit, adapted to be coupled to said heart via said cardiac lead and coupled to said Δ

Z processor, said impedance circuit producing an impedance voltage waveform corresponding to impedance in said heart;

said Δ

Z processor having sampling means for periodically sampling said impedance voltage waveform and further having means for producing a serial bit stream output signal in response to each said sample, the number of logical `1` bits (hereinafter referred to as `counts`) in said bit stream output signal corresponding to a change in said impedance voltage waveform;

said rate control circuit comprising a Long-Term average (LTA) circuit, having means for receiving said bit stream output signal and having computing means responsive to said bit stream output signal to compute a Long-Term Average (LTA) value corresponding to an average count, over a predetermined long-term interval, of said counts occurring in each two-second portion of said long-term interval;

said rate control circuit further comprising a Limited Short-Term Average (LSTA) circuit, having means for receiving said bit stream output signal and having computing means responsive to said bit stream output signal to compute a Limited Short-Term Average (LSTA) value corresponding to an average count, over a predetermined short-term interval, of said counts occurring in each two-second portion of said short-term interval, where said rate control circuit constrains said LSTA value to a range determined by said predetermined upper and lower pacing rates;

said rate control circuit further comprising a Limited Positive Difference (DZ) circuit, having means for receiving said LSTA and said LTA values and having computing means for computing a Limited Positive Difference (DZ), representing a comparison of said LTA and said LSTA values according to the formula ##EQU16## where DZ_mm is a predefined upper limit on said DZ value;

said rate control circuit producing triggering pulses at a rate determined as a function of said DZ value.