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Complementary low power non-volatile reconfigurable EEcell

  • US 5,272,368 A
  • Filed: 05/10/1991
  • Issued: 12/21/1993
  • Est. Priority Date: 05/10/1991
  • Status: Expired due to Term
First Claim
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1. In a programmable logic device, a configuration cell comprising:

  • a common floating gate;

    an output node;

    a write node;

    a control gate;

    a p-channel MOS device with a source coupled to a first voltage, a drain coupled to said output node, and a gate coupled to said common floating gate;

    an n-channel MOS device with a drain coupled to said output node and to said drain of said p-channel MOS device, a source coupled to a second voltage, a gate coupled to said common floating gate, said MOS devices being coupled together such that in a steady state, only one of said MOS devices conducts;

    a tunnel capacitor, for providing charge to and removing charge from said common floating gate, having its first terminal coupled to said common floating gate and its other terminal coupled to said write node; and

    a capacitor having its first terminal coupled to said common floating gate and its other terminal coupled to said control gate.

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