Data acquisition system having novel, low power circuit for time-division-multiplexing sensor array signals

• US 5,272,476 A
• Filed: 04/04/1991
• Issued: 12/21/1993
• Est. Priority Date: 04/04/1991
• Status: Expired due to Term

• Current Assignee: the united states of america as represented by the secretary of the navy
• Original Assignee: the united states of america as represented by the secretary of the navy
• Inventors: McArthur, Scot P., Williams, Robert B., Olson, Jack R.
• Primary Examiner(s): Yusko, Donald J.
• Assistant Examiner(s): GIUST, JOHN
• Application Number:
  US07/681,230
• Time in Patent Office: 992 Days
• Field of Search: 340/870.13, 340/310 R, 340/533, 340/825.07, 340/825.1, 340/825.11, 340/825.52, 340/825.54, 340/855.3, 340/855.4, 370/85.11, 370/85.9, 358/213.15, 364/707
• US Class Current: 340/870.13
• CPC Class Codes: G08C 15/08 the signals being represented by amplitude of current or voltage in transmission link
• CPC Class Codes: H04Q 9/16 by predetermined number of pulses

Abstract

An electronic circuit architecture time-division-multiplexes analog sensorignals from a distributed sensor array onto a common transmission line in a digitally encoded format. The architecture synchronizes the multiplexing, sampling and encoding to ensure a proper settling of the analog data signals and is fabricated to be compact with low power consumption for a cost-effective implementation for a number of sensors.

Claims

1. A data acquisition system for the direct time-division-multiplexing of a plurality of analog data signals onto a single line having a control conductor and an analog data conductor comprising:

a plurality of sequential TDM transceivers coupled to said single line each provided with a missing pulse detector, a down counter, a low power mode line driver and an analog sensor that generates an analog data signal, said missing pulse detector is connected to said control conductor and said down counter, said down counter is connected to said control conductor and said line driver, and said line driver is connected to said analog data conductor and said analog sensor and

a control circuit connected to said plurality of sequential TDM transceivers via said control conductor and said analog data conductors having a timing generator, a sampler circuit and a quantizer circuit, said timing generator is connected to said control conductor and provides negative preset pulses for each said missing pulse detector of each of said plurality of sequential TDM transceivers to initiate each repetitive time frame and provides a series of negative strobe pulses within each said time frame each at the beginning of separate ones of a series of time slots in each said time frame, said timing generator is connected to said sampler circuit and provides a series of sample-and-hold signals, each at the end of separate ones of said series of said time slots in each said time frame and said timing generator is connected to said quantizer and provides a series of convert signal pulses, each at the beginning of separate ones of a series of time slots in each said time frame and each coincident with each of said series of negative strobe pulses, upon the generation of a plurality of said analog data signals each from a separate one of said plurality of sequential TDM transceivers, each said missing pulse detector is initiated by said negative preset pulses from said timing generator to activate its interconnected said down counter to receive said series of said negative strobe signal pulses from said timing generator to connect its said line driver to said analog data conductor when a predetermined amount of said negative strobe signal pulses are received thereby to sequentially couple each said analog data signal onto said analog data conductor and to allow each said analog data signal to settle in said sample circuit for over one-half the duration of a time slot until the appropriate said sample-and-hold pulse signal initiates an appropriate sample-and-hold window and the appropriate said convert signal pulse enables a digitizing by said quantizer circuit of each said analog data signal, in which said negative preset pulses are each a 100 percent duty cycle negative pulse at the beginning of each said time frame to initiate a sampling cycle thereof and said negative strobe pulses are each a 25 percent duty cycle per time slot negative strobe pulse at the beginning of each time slot for each respective TDM receiver to assure that its associated said analog data signal is allowed to settle in the interconnected said sampler circuit for the duration of its respective time slot to further assure that said sampler circuit and said quantizer circuit are actuated with a minimum power drain.

2. An apparatus according to claim 1 in which said 25 percent duty cycle per time slot negative strobe pulse assures an addressing scheme requiring only one 25 percent duty cycle per time slot negative pulse per sensor of each said TDM transceiver.

3. An apparatus according to claim 2 in which said timing generator provides a said preset negative pulse at the beginning of each time frame and sequential 25 percent duty cycle per time slot negative strobe pulses at the beginning of each time slot within each said frame and said timing generator further provides said sample-and-hold enabling pulses to said sampler circuit prior to an initiation of the next 25 percent duty cycle per time slot negative strobe pulse in each time slot to assure a suitable sampling time for each said analog data signal and said timing generator provides said convert signal pulses for said quantizer circuit to enable said digitizing therein.