Adaptive hierarchical subband vector quantization encoder
First Claim
1. A method for data compression of a digital image signal whereby said image signal is subdivided into pixel blocks, each pixel represented by a predetermined number of bits, comprising the steps of:
- (a) generating the discrete cosine transform for said block, resulting in a corresponding block of transform coefficients;
(b) scalar quantizing DC and one or more AC coefficients of said discrete cosine transform;
(c) dividing remaining said AC coefficients which are not scalar quantized into a plurality of subband vectors according to their frequency components;
(d) vector quantizing said subband vectors composed of subband coefficients resulting in a code for each said subband vector; and
(e) repeating the above steps for each said block of said image signal.
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Abstract
A method system for data reduction of digital video signals based on vector quantization of vectors formed from coefficients of a discrete cosine transform of pixel blocks. The coefficients are grouped into subbands and both scalar and vector quantization are used. Vector quantization is implemented either directly on the vectors or on vectors formed from inter-frame differences between the transformed vectors. The vector quantization searching routine is in accordance with the Voronoi regions resulting from an off-line codeword clustering method using a minimum distance criterion.
115 Citations
21 Claims
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1. A method for data compression of a digital image signal whereby said image signal is subdivided into pixel blocks, each pixel represented by a predetermined number of bits, comprising the steps of:
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(a) generating the discrete cosine transform for said block, resulting in a corresponding block of transform coefficients; (b) scalar quantizing DC and one or more AC coefficients of said discrete cosine transform; (c) dividing remaining said AC coefficients which are not scalar quantized into a plurality of subband vectors according to their frequency components; (d) vector quantizing said subband vectors composed of subband coefficients resulting in a code for each said subband vector; and (e) repeating the above steps for each said block of said image signal. - View Dependent Claims (2, 3, 4, 5)
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6. A system for data compression of a digital image signal whereby said image signal is subdivided into pixel blocks, each pixel represented by a predetermined number of bits, comprising:
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(a) a video preprocessor stage for receiving a plurality of individually selectable video input data, said preprocessor comprising individually selectable stages for formatting said input video data into separate digital luminance and chrominance data, said chrominance data reduced by averaging, said digital luminance and chrominance data assembled into pixel blocks which are transformed by a discrete cosine transformation processor which additionally forms subband vectors from transform coefficients of a particular frequency band and scalar quantizes coefficients corresponding DC and AC components; (b) a vector quantization processor stage connected to output of said preprocessor stage for outputting a code corresponding to the result of a search for a minimum mean square error codeword with respect to a particular said subband vector; and (c) a data flow management stage connected to the output of said vector quantization processor further receiving said scalar quantized coefficients, comprising;
a data flow control unit which monitors output data buffer and regulates data received from said vector quantization processor according to said output data buffer status;
a Huffman encoder which receives said regulated data from said data flow control unit;
a format control unit which formats received Huffman coded data; and
said output buffer which receives formatted data and outputs said data at a predetermined rate. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13)
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14. A system for data compression of a digital image signal whereby said image signal is subdivided into pixel blocks, each pixel represented by a predetermined number of bits, comprising:
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(a) an input terminal for accepting a plurality of individually selectable video signals; (b) a selectively operable digitizing stage connected to said input terminal for conversion of input analog video signals; (c) a selectively operable pulldown stage connected to said digitizing stage for reducing the frame rate of said video signals by eliminating redundant fields or combining correlated fields; (d) a frame formation stage connected to said pulldown stage comprising circuitry for removing video blanking data, separating color data, and generating a frame format video signal from a field oriented video signal; (e) a frame motion estimation stage connected to output of said frame formation stage for generating an output signal corresponding to a relative motion between adjacent image frames; (f) a scene change stage connected to said frame motion estimation stage for determining a change of scene event and generating a signal corresponding to occurrence of said event; (g) a frame motion compensation stage connected to output of frame estimation stage for reframing luminance and chrominance data; (h) a block forming circuit connected to said compensation stage for forming data blocks for luminance and chrominance data; (i) a color averaging circuit connected to luminance block data output from block forming stage for reducing said chrominance data and outputting reduced chrominance data in block format; (j) a transformation stage connected to output of said block forming circuit and color averaging circuit for generating discrete cosine transformation data for each received said block and grouping resulting transform coefficients into a plurality of subbands; (k) a vector quantization stage connected to said transformation stage having an output code corresponding to a codeword which best matches input vector; (l) a data flow control stage connected to output of said vector quantization stage and to output of said transformation stage, also monitoring an output data buffer, said data flow control stage regulating data flow into said output data buffer; (m) a Huffman coding stage connected to output of said data flow control stage for data reduction prior to transfer to said output data buffer; (n) a format control stage connected to output of said Huffman coding stage for organizing said data according to a predetermined format; and (o) said output data buffer connected to output of said format control stage for storing said data and outputting said data at a predetermined rate. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21)
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Specification