Method of making a solid state electromagnetic radiation detector
First Claim
1. A method of making a solid state detector for detecting electromagnetic energy, comprising the steps of:
- (a) depositing a plurality of field effect transistors onto a substrate to form an array, wherein each of the field effect transistors has a gate electrode, and wherein a portion of the substrate contiguous to the field effect transistors is an insulating material;
(b) depositing a planarization layer over the array of field effect transistors, wherein the planarization layer is formed from an insulating material, and wherein the planarization layer has a planarized upper surface;
(c) depositing an energy sensitive layer onto the planarization layer, wherein the energy sensitive layer has an additional capacitance;
(d) depositing a plurality of bottom electrodes interposed between the planarization layer and the energy sensitive layer, wherein each bottom electrode is electrically coupled to the gate electrode of a single field effect transistor;
(e) depositing a top electrode layer onto the energy sensitive layer; and
(f) depositing circuitry means for providing electronic read-out from each field effect transistor of the array.
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Abstract
The present invention provides a large area, high pixel density solid state radiation detector with a real-time and a non-destructive read-out. The solid state detector comprises a plurality of field effect transistors deposited onto a substrate to form an array. A planarization layer is deposited over the array of transistors. An energy sensitive layer is deposited onto the planarization layer. Means is provided for electrically connecting the energy sensitive layer with each transistor of the array. A top electrode layer is deposited onto the energy sensitive layer. The solid state detector also comprises circuitry means for providing electronic read-out from each FET of the array.
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Citations
15 Claims
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1. A method of making a solid state detector for detecting electromagnetic energy, comprising the steps of:
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(a) depositing a plurality of field effect transistors onto a substrate to form an array, wherein each of the field effect transistors has a gate electrode, and wherein a portion of the substrate contiguous to the field effect transistors is an insulating material; (b) depositing a planarization layer over the array of field effect transistors, wherein the planarization layer is formed from an insulating material, and wherein the planarization layer has a planarized upper surface; (c) depositing an energy sensitive layer onto the planarization layer, wherein the energy sensitive layer has an additional capacitance; (d) depositing a plurality of bottom electrodes interposed between the planarization layer and the energy sensitive layer, wherein each bottom electrode is electrically coupled to the gate electrode of a single field effect transistor; (e) depositing a top electrode layer onto the energy sensitive layer; and (f) depositing circuitry means for providing electronic read-out from each field effect transistor of the array. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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Specification