Multiple chip package with thinned semiconductor chips

• US 5,273,940 A
• Filed: 06/15/1992
• Issued: 12/28/1993
• Est. Priority Date: 06/15/1992
• Status: Expired due to Term

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Sanders, Paul W.
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): Picardat, Kevin M.
• Application Number:
  US07/898,646
• Time in Patent Office: 561 Days
• Field of Search: 437/209, 437/211, 437/217, 437/220, 437/207, 437/974, 437/225, 148/DIG. 135
• US Class Current: 438/107
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/06131 being uniform, i.e. having a uniform pitch across the array
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 23/36 Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks H01L23/28, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence; heating H01L23/345
• CPC Class Codes: H01L 24/10 Bump connectors bumps on insulating substrates, e.g. chip carriers, H01L23/49816; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/12044 OLED
• CPC Class Codes: H01L 2924/30107 Inductance
• CPC Class Codes: Y10S 438/977 : Thinning or removal of substrate

Abstract

An assembly is formed by coupling a plurality of semiconductor chips (26-29) to a surface of a substrate (17). An encapsulation material (22) is placed on the surface of the substrate (17) to protect the semiconductor chips (26-29) from an external environment. Material is removed from the plurality of semiconductor chips (26-29) to thin each semiconductor chip (26-29) to promote thermal conductivity.

Claims

1. A method for forming a multiple chip package with thinned semiconductor chips comprising:

providing a plurality of semiconductor chips, each semiconductor chip having a plurality of contact pads;

providing a substrate;

forming a plurality of substrate contact pads on the substrate for each semiconductor chip wherein each semiconductor chip has a corresponding plurality of contact pads which physically align to the substrate contact pads;

forming a gold bump on each contact pad on each semiconductor chip, wherein each gold bump has a substantially similar height;

coupling each semiconductor chip to the substrate by mating the gold bumps on a semiconductor chip to a corresponding substrate contact pad on the substrate;

placing an encapsulating material on the substrate to surround the semiconductor chips while leaving a portion of the semiconductor chips exposed;

removing exposed semiconductor material from the plurality of semiconductor chips to make each semiconductor chip thinner; and

coupling a heatsink to the plurality of semiconductor chips.

2. The method for forming a multiple chip package with thinned semiconductor chips of claim 1 wherein the forming a gold bump step includes:

forming a gold surface on each contact pad on each semiconductor chip;

using photoresist to mask off areas surrounding each contact pad on each semiconductor chip;

forming the gold bump on each contact pad of each semiconductor chip by electroplating; and

removing photoresist from each semiconductor chip or from the substrate.

3. The method for forming a multiple chip package with thinned semiconductor chips of claim 1 wherein the providing a substrate step includes:

forming the substrate from aluminum oxide, wherein the aluminum oxide substrate has metal interconnect;

forming a gold surface on the corresponding substrate contact pads;

forming a plurality of metal plated openings through the substrate, wherein the metal plated openings allow electrical connection to the substrate from a side opposite from which the plurality of semiconductor chips are mounted; and

placing a plurality of metal stops on the substrate, wherein the plurality of metal stops are used in the removal of material from the plurality of semiconductor chips.

4. The method for forming a multiple chip, package with thinned semiconductor chips of claim 1 wherein the coupling each semiconductor step includes:

heating the plurality of semiconductor chips and the substrate to heat each gold bump to bond to each contact pad.

6. The method for forming a multiple chip package with thinned semiconductor chips of claim 1 wherein the removing material from the plurality of semiconductor chip step includes:

using a grinding disk to remove material from the plurality of semiconductor chips wherein material is removed from the plurality of semiconductor chips simultaneously to thin each semiconductor chip a substantially similar amount.

7. The method for forming a multiple chip package with thinned semiconductor chips of claim 1 wherein the coupling a heatsink step includes:

forming the heatsink of copper;

placing a thermal conducting means on the plurality of semiconductor chips; and

attaching the heatsink on the thermal conducting means.

5. The method for forming a multiple chip package with thinned semiconductor chips of claim I wherein the placing an encapsulation material step includes:

using epoxy as the encapsulating material.

8. A method for forming a semiconductor chip package comprising;

forming an assembly comprising a plurality of semiconductor chips coupled to a substrate;

placing an encapsulation material on the substrate to surround the semiconductor chips while leaving a backside of the semiconductor chips exposed;

placing a plurality of metal stops on the substrate wherein the metal stops are placed on the substrate as a final semiconductor chip height indicator;

grinding the assembly using a grinding disk to remove material form the backside of the plurality of semiconductor chips; and

attaching a heat sink to the back side of the plurality of semiconductor chips.

9. The method for forming a semiconductor chip package of claim 8 wherein the forming an assembly step includes:

providing a plurality of contact pads on each semiconductor chip and forming a corresponding plurality of substrate contact pads for each semiconductor chip on the substrate, wherein the contact pads and the corresponding substrate contact pads have a gold surface;

forming a metal bump on each contact pad of each semiconductor chip wherein the metal bump is formed of gold; and

coupling the plurality of contact pads on each semiconductor chip and the corresponding plurality of substrate contact pads on the substrate wherein the metal bump on each contact pad of each semiconductor chip forms a physical and electrical bond to a corresponding substrate contact pad.

10. The method for forming a semiconductor chip package of claim 9 wherein the forming an assembly step includes:

providing a plurality of contact pads on each semiconductor chip and forming a corresponding plurality of substrate contact pads for each semiconductor chip on the substrate, wherein the contact pads and the corresponding substrate contact pads have a gold surface;

forming a metal bump on each corresponding substrate contact pad on the substrate, wherein the metal bump is formed of gold; and

coupling the plurality of contact pads on each semiconductor chip and the corresponding plurality of substrate contact pads on the substrate wherein the metal bump on each corresponding substrate contact pad on the substrate forms a physical and electrical bond to a corresponding contact pad on a semiconductor chip.

11. The method for forming a semiconductor chip package of claim 8 wherein the forming the assembly step and the placing an encapsulation material step includes

using epoxy as the encapsulation material.

12. The method for forming a semiconductor chip package of claim 8 wherein the attaching a heatsink step includes:

placing a thermal conductive material on the back side of the plurality of semiconductor chips;

forming the heatsink from copper;

placing the heatsink on the thermal conductive material; and

fastening the heatsink to the assembly.

13. A method for forming a semiconductor package having a plurality of thinned semiconductor chips to promote heat dissipation comprising:

providing a plurality of semiconductor chips;

providing a substrate for mounting the plurality of semiconductor chips, said substrate having a plurality of metal plated holes for providing electrical interconnect to either side of the substrate;

coupling the plurality of semiconductor chips to a surface of the substrate, wherein circuitry on each semiconductor chip faces the substrate leaving a backside of each semiconductor chip exposed;

placing an encapsulation material on the surface of the substrate wherein the encapsulation material surrounds the semiconductor chips and protects the surface of the substrate;

removing material from the backside of the plurality of semiconductor chips, wherein the plurality of semiconductor chips are thinned to promote heat dissipation; and

coupling the heat sink to the back side of the plurality of semiconductor chips for removing heat.

14. The method for forming a semiconductor package having a plurality of thinned semiconductor chips to promote heat dissipation of claim 13 wherein the providing the substrate step includes:

forming the substrate from aluminum oxide; and

placing a plurality of metal stops on the substrate wherein the plurality of metal stops indicate when a correct amount of material has been removed from the backside of the semiconductor chips.

15. The method for forming a semiconductor package having a plurality of thinned semiconductor chips to promote heat dissipation of claim 13 wherein the coupling the plurality of semiconductor chips to a surface of the substrate step includes:

forming a plurality of contact pads on each semiconductor chip;

forming a corresponding plurality of substrate contact pads for each semiconductor chip on the substrate;

forming a coupling means on each contact pad of each semiconductor chip; and

coupling each semiconductor chip to the substrate wherein each contact pad on each semiconductor chip is bonded to a corresponding substrate contact pad by the coupling means.

16. The method for forming a semiconductor package having a plurality of thinned semiconductor chips to promote heat dissipation of claim 13 wherein the coupling the plurality of semiconductor chips to a surface of the substrate step includes:

forming a plurality of contact pads on each semiconductor chip;

forming a corresponding plurality of substrate contact pads for each semiconductor chip on the substrate;

forming a coupling means on each corresponding substrate contact pad on the substrate; and

coupling each semiconductor chip to the substrate wherein each contact pad on each semiconductor chip is bonded to a corresponding substrate contact pad by the coupling means.

17. The method for forming a semiconductor package having a plurality of thinned semiconductor chips to promote heat dissipation of claim 13 wherein the placing an encapsulation material step includes:

choosing encapsulating material as an epoxy wherein the epoxy prevents the surface of the substrate from exposure to an external environment.

18. The method for forming a semiconductor package having a plurality of thinned semiconductor chips to promote heat dissipation of claim 13 wherein the removing material step includes:

thinning the backside of the plurality of semiconductor chips with a grinding disk.

19. The method for forming a semiconductor package having a plurality of thinned semiconductor chips to promote heat dissipation of claim 13 further including:

coupling the backside of the semiconductor chips to a heatsink.

20. The method for forming a semiconductor package having a plurality of thinned semiconductor chips to promote heat dissipation of claim 19 wherein the coupling the backside of the semiconductor chips step includes:

placing a thermal conductive material on the backside of the semiconductor chips to insure uniform coupling to a heatsink; and

placing a heatsink on the thermal conductive material, wherein the heatsink is made of copper; and

fastening the heatsink to the substrate.