Sample rate converter circuit for image data
First Claim
1. A sample rate converter comprising:
- storage means including a random access memory for storing input data at a first sample rate,convolution filter means for directly filtering the input data to produce output data at a second sampling rate, wherein said filter means includes;
a filter coefficient storage outputting filter coefficients corresponding to the input data and for each sample conversion rate, anda multiplier connected to said storage means and multiplying the input data times the filter coefficients;
an accumulator connected to said multiplier and accumulating the coefficient multiplied input data, andmultiplication storage means connected to said memory for storing all combinations of pixel values time filter coefficients for each sample conversion rate, andan accumulator connected to said storage means, further comprising a control unit connected to said memory and said filter means, said control unit includes;
a multiplexer selecting between memory pointers for said memory;
first and second pointer counters connected to said multiplexer;
a third pointer counter connected to said multiplication storage; and
a control unit connected to said storage means, said filter means and said pointer counters.
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Abstract
The present invention is a sample rate converter in which a weighted filtering operation is performed. This operation stores a pixel stream in a random access memory (RAM) 30. During conversion pointers stored in counter 38 and register 40 are used to select the pixels from the RAM which are then multiplied by filter weights and accumulated. A counter 44 and mapping unit 46 select the weight being multiplied. The multiplication is performed by a lookup table read only memory (ROM) 32 that stores the results of the pixel-weight multiplication for all combinations of pixels and weights for each sample rate. An accumulator 33 stores the results of the multiplication until all multiplications have occurred at which point the filtered pixel is output. The output of the lookup table 32 is controlled by the pixel value, the coefficient selected and the table or map selected. The lookup table stores symmetric weights for as many conversion rates as desired. The mapping unit 46 maps a sequential coefficient count to a coefficient identifier which is non-sequential and symmetric allowing the size of ROM 32 to minimized and the number of address lines provided to the ROM 32 to be minimized.
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Citations
6 Claims
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1. A sample rate converter comprising:
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storage means including a random access memory for storing input data at a first sample rate, convolution filter means for directly filtering the input data to produce output data at a second sampling rate, wherein said filter means includes; a filter coefficient storage outputting filter coefficients corresponding to the input data and for each sample conversion rate, and a multiplier connected to said storage means and multiplying the input data times the filter coefficients; an accumulator connected to said multiplier and accumulating the coefficient multiplied input data, and multiplication storage means connected to said memory for storing all combinations of pixel values time filter coefficients for each sample conversion rate, and an accumulator connected to said storage means, further comprising a control unit connected to said memory and said filter means, said control unit includes; a multiplexer selecting between memory pointers for said memory; first and second pointer counters connected to said multiplexer; a third pointer counter connected to said multiplication storage; and a control unit connected to said storage means, said filter means and said pointer counters. - View Dependent Claims (2, 3, 4, 5)
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6. A sample rate converter for converting input pixel values input at a first rate to output pixel values produced at a second rate, said converter comprising:
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a random access memory storing the input data; a multiplexer connected to said random access memory; a first counter connected to said multiplexer and controlling storage of the input pixel values into said random access memory; a register connected to said multiplexer and controlling output of the input pixel values to produce the output pixel values; a read only memory connected to said random access memory and storing pixel values times filter coefficient values; a mapping unit connected to said read only memory and producing a coefficient selection value; a counter connected to said mapping unit and controlling production of the coefficient selection value; and an accumulator connected to said read only memory and producing the output pixel values.
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Specification