Automatic signal configuration

• US 5,274,800 A
• Filed: 02/22/1991
• Issued: 12/28/1993
• Est. Priority Date: 02/22/1991
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Company (HP Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Speer, Martin L., Babb, Samuel M.
• Primary Examiner(s): Canney, Vincent P.
• Application Number:
  US07/659,205
• Time in Patent Office: 1,040 Days
• Field of Search: 395/575, 364/926.91, 364/927.93, 364/940.2, 364/940.61, 364/240.1, 364/240.5
• US Class Current: 714/32
• CPC Class Codes: G06F 13/37 using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing

Abstract

A system and method are disclosed for automatically configuring the interconnection of circuit boards in slots on the backplane of a computer. Some signal lines, such as bus grant and interrupt acknowledge signals, must be daisy-chained, or connected in series through the circuit boards collectively. However, if a circuit board is not present, then the daisy-chain is broken. For each slot to be monitored in the backplane, the present invention envisions implementing a generator, a valid logic level detector and a signal selector. The generator imposes an invalid logic signal onto an output connector of a slot to derive an input for the valid logic level detector. Based upon the input, the detector determines whether a circuit board resides in the slot. Accordingly, the detector adjusts the signal selector to either bypass the slot or connect the slot, as well as the present circuit board, to the daisy-chain.

Claims

1. A system for determining whether valid digital information is present of a digital line based upon the analog nature of said digital line, the system comprising:

a generator adapted to continuously drive an invalid logic signal onto said digital line, said invalid logic signal capable of being overdriven by a valid logic signal on said digital line; and

a detector connected to said digital line and adapted to determine whether said valid logic signal is present on said digital line.

2. The system of claim 1, further comprising a signal selector responsive to said detector, said signal selector for connecting a first electrical path to a second electrical path when said valid logic signal is present on said digital line, said signal selector for connecting said first electrical path to a third electrical path when said invalid logic signal is present on said digital line.

3. The system of claim 1, further comprising a signal selector responsive to said detector, said signal selector for connecting said digital line to another circuit element when said valid logic signal is present on said digital line.

4. The system of claim 1, wherein said generator further comprises a voltage follower to isolate said generator from said detector.

5. The system of claim 1, wherein said invalid logic signal is a voltage which is generated by a voltage divider.

6. The system of claim 1, wherein said invalid logic signal is a current.

7. The system of claim 2, further comprising a low pass filter connected between said detector and said signal selector.

8. The system of claim 2, wherein said signal selector comprises one of the following:

a relay, multiplexer, or switching element.

9. The system of claim 2, wherein said first electrical path resides within a daisy chain and wherein said signal selector maintains communication via said daisy chain.

10. The system of claim 5, wherein a low voltage reference and a high voltage reference are generated from said voltage divider and wherein said low voltage reference and said high voltage reference are utilized by said detector to determine whether said valid logic signal is present on said digital line.

11. The system of claim 9, wherein said daisy chain comprises an electrical line passing through circuit boards and slots within a microcomputer and wherein said digital line is an output from a slot.

12. The system of claim 10, wherein said detector further comprises first and second comparators, said first comparator for using said low voltage reference to recognize said valid logic signal in a low logical state, said second comparator for using said high voltage reference to recognize said valid logic signal in a high logical sate.

13. A system for automatically configuring the interconnection of circuit boards interfaced to a backplane in a computer to thereby maintain a daisy-chain configuration, the system comprising:

generator means for continuously driving an invalid logic signal onto an output of a slot for a circuit board, said invalid logic signal capable of being overdriven by said output of said circuit board when said output comprises a valid logic signal;

detector means for receiving said output and for determining whether said output is either within a predetermined valid logic range or a predetermined invalid logic range; and

selector means responsive to said detector, said selector means for bypassing daisy-chain lines of said slot when said output resides within said predetermined invalid logic range, said selector means for connecting said daisy-chain lines of said slot within said daisy-chain when said output resides within said predetermined valid logic range.

14. The system of claim 13, wherein said generator means further comprises a voltage follower to isolate said generator means from said detector means.

15. The system of claim 13, wherein said invalid logic signal is a voltage which is generated by a voltage divider.

16. The system of claim 13, wherein said invalid logic signal is a current.

17. The system of claim 13, further comprising a low pass filter connected between said detector means and said selector means.

18. The system of claim 15, wherein a low voltage reference and a high voltage reference are generated from said voltage divider and wherein said low voltage reference and said high voltage reference are utilized by said detector means for determining whether said output is either within a predetermined valid logic range or a predetermined invalid logic range.

19. The system of claim 18, wherein said detector means further comprises first and second comparators, said first comparator for using said low voltage reference to recognize said output in said low valid logic range, said second comparator for using said high voltage reference to recognize said output in said high valid logic range.

20. A method for determining whether valid digital information is present on a digital line based upon the analog signal level of said digital line, the method comprising the steps of:

(1) driving an invalid logic signal onto said digital line wherein said invalid logic signal is capable of being overdriven by a valid logic signal on said digital line;

(2) detecting the signal level on said digital line;

)3) determining whether said level falls within either a predefined invalid logic range of a predefined valid logic range; and

(4) concluding that no valid digital information resides on said digital line when said signal level is determined to be within said predefined invalid logic range.