Parallel port multiplexor for PC parallel port

• US 5,276,443 A
• Filed: 03/27/1991
• Issued: 01/04/1994
• Est. Priority Date: 03/27/1991
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Xircom Incorporated (Intel Corporation)
• Inventors: Pooley, Monte A., Matthews, James K., Rosen, David B., Gates, Dirk I.
• Primary Examiner(s): Yusko, Donald J.
• Assistant Examiner(s): ZIMMERMAN, BRIAN A
• Application Number:
  US07/675,688
• Time in Patent Office: 1,014 Days
• Field of Search: 340/825.06, 340/825.03, 340/825.21, 307/125, 439/44, 439/49, 439/502, 439/620, 375/36, 200/51.02, 200/51.03, 200/51.04, 200/51.05, 200/51.06
• US Class Current: 710/2
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices

Abstract

A multiplexor for use with a computer having a parallel port, for providing multiple separately addressable auxiliary parallel ports.

Claims

1. Multiplexor apparatus, for use with a computer having a parallel port including an externally accessible standard female parallel port connector, for providing first and second separately addressable auxiliary parallel ports, said multiplexor apparatus comprising:

a host connector having internal and external signal lines, said external signal lines configured for selectable connection to said external accessible parallel port connector;

a first device connector having internal and external signal lines, said external signal lines physically configured as a standard female parallel port connector for selectable connection to a peripheral device;

a second device connector having internal and external signal lines, said external signal lines physically configured as a standard female parallel port connector for selectable connection to a peripheral device;

nonmanual switch means for selectively connecting said host connector internal signal lines to either said first device connector internal signal lines or said second device connector internal signal lines; and

control means responsive to signals on said host connector internal signal lines for controlling said switch means.

2. The apparatus of claim 1 further including:

a housing;

said host, first device, and second device connectors mounted in said housing with the external signal lines of each physically accessible externally of said housing; and

wherein,

said switch means and control means are mounted in said housing

3. The apparatus of claim 1 further comprising:

energy storage means for supplying electrical power to said switch means and said control means; and

means connecting said host connector internal signal lines to said energy storage means for supplying electrical energy thereto.

4. The apparatus of claim wherein said switch means selectively defines either a first state or a second state to connect said host connector internal signal lines to said first device connector and said second device connector internal signal lines, respectively;

and wherein

said host connector internal signal lines include data lines and control lines; and

wherein

said control means is responsive to encoded signals on said data lines for switching said switch means from said first to said second state.

5. In combination with a computer having a parallel port including an externally accessible standard female parallel port connector, multiplexor apparatus externally connected to said parallel port connector for providing at least first and second auxiliary parallel ports separately addressable by said computer, said apparatus comprising:

a host connector having internal and external signal lines, said external signal lines detachably connected to said externally accessible parallel port connector;

a first auxiliary parallel port comprising a first device connector having internal and external signal lines, said external signal lines physically configured as a standard female parallel port connector for selectable connection to a peripheral device;

a second auxiliary port comprising a second device connector having internal and external signal lines, said external signal lines physically configured as a standard female parallel port connector for selectable connection to a peripheral device;

nonmanual switch means for selectively connecting said host connector internal signal lines to either said first device connector internal signal lines or said second device connector internal signal lines; and

control means responsive to signals on said host connector internal signal lines from said parallel port connector for controlling said switch means.

6. The combination of claim 5 including program means executable by said computer for producing address signals at said computer parallel port connector identifying either said first or said second auxiliary parallel ports;

and wherein

said control means is responsive to said address signals for controlling said switch means to connect said host connector internal signal lines to the device connector associated with said identified auxiliary port.

7. The apparatus of claim 6 further comprising:

energy storage means for supplying electrical power to said switch means and said control means; and

means connecting said host connector internal signal lines to said energy storage means for supplying electrical energy thereto.

8. The combination of claim 7 wherein said program means causes said computer to supply electric current via said computer parallel port connector to said host connector for supplying said electrical energy to said energy storage means.

9. The apparatus of claim 5 wherein said switch means selectively defines either a first state or a second state to connect said host connector internal signal lines to said first device connector and said second device connector internal signal lines, respectively;

and wherein

said host connector internal signal lines include data lines and control lines; and

wherein

said control means is responsive to encoded signals on said data lines for switching said switch means from said first to said second state.