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Integrated semiconductor circuit

  • US 5,276,643 A
  • Filed: 11/26/1991
  • Issued: 01/04/1994
  • Est. Priority Date: 08/11/1988
  • Status: Expired due to Term
First Claim
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1. An integrated semiconductor circuit, comprising:

  • a plurailty of word lines and a plurality of bit lines, each bit line including a pair of complementary bit line halves;

    a memory region including at least one memory cell field, each memory cell field including a plurailty of memory cells addressable by said word lines and said bit lines;

    A plurality of sense amplifiers, each connected to a respective bit line;

    A plurality of logic units, each connected to a respective sense amplifier for digitally processing data received from said sense amplifiers; and

    mode selecting means connected to said logic units for selecting different operating modes of said logic units by means of mode select signals;

    mode select signal deactivating means connected to said mode selecting means for deactivating said mode select signals;

    including in each of said logic units;

    a first and a second transistor, each having a source, a drain and a gate, for logic inversion of said data; and

    a charge capacitor having a first and a second terminal, wherein the drain of said first and second transistor is connected to the first terminal of said charge capacitor, the source of said first transistor is connected to one of said bit line halves, and the source of the second transistor is connected to the other one of said bit line halves, and wherein said mode select signals include two first mode select signals.

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