×

Method for transferring information between main store and input output bus units via a sequence of asynchronous bus and two synchronous buses

  • US 5,276,814 A
  • Filed: 05/10/1989
  • Issued: 01/04/1994
  • Est. Priority Date: 09/19/1986
  • Status: Expired due to Fees
First Claim
Patent Images

1. A method of performing a data storage operation in a main data store over a plurality of buses, said plurality including a first asynchronous bus interconnecting one or more Input/Output Bus Units (IOBUs) and a first Input/Output Interface Controller (IOIC), a second synchronous bus interconnecting said first IOIC and one or more additional IOICs and a storage controller, and a third synchronous bus interconnecting said storage controller and said main data store, said first asynchronous bus including a first address/data bus, a command/status bus, an origin/destination bus, and a handshaking line group, said second synchronous bus including a second address/data bus, a key/status bus and a control line group, said third synchronous bus including a third address/data bus and a storage control bus, said method comprising the unordered steps of:

  • (a) arbitrating a request from a first said IOBU or said first IOIC for control of said first asynchronous bus;

    (b) transferring information on said first asynchronous bus between said first IOBU and said first IOIC by exchanging asynchronous handshaking signals via said handshaking line group,a first part of said information being transferred between said first IOBU and said first IOIC via said first address/data bus,a second part of said information being transferred between said first IOBU and said first IOIC via said command/status bus, anda third part of said information being transferred between said first IOBU and said first IOIC via said origin/destination bus;

    (c) storing said first and said third parts of said information in said first IOIC;

    (d) arbitrating a request from said first IOIC or said main data store for control of said second and third synchronous buses;

    (e) transferring information on said second synchronous bus between said first IOIC and said storage controller in response to clock signals from said second synchronous bus,said first part of said information being transferred between said first IOIC and said storage controller via said second address/data bus; and

    (f) transferring information on said third synchronous bus between said storage controller and said main data store in response to clock signals from said third synchronous bus,said first part of said information being transferred between said storage controller and said main data store via said third address/data bus.

View all claims
  • 0 Assignments
Timeline View
Assignment View
    ×
    ×