Threshold crossover detector with improved digital noise rejection

• US 5,278,462 A
• Filed: 04/24/1992
• Issued: 01/11/1994
• Est. Priority Date: 04/24/1992
• Status: Expired due to Term

• Current Assignee: Fasco Controls Corp.
• Original Assignee: Fasco Controls Corp.
• Inventors: Wilson, Michael A.
• Primary Examiner(s): Zazworsky, John
• Application Number:
  US07/873,253
• Time in Patent Office: 627 Days
• Field of Search: 307/354, 307/309, 307/542.1, 307/491, 307/542, 324/78 R, 328/150, 328/117
• US Class Current: 327/79
• CPC Class Codes: H03K 5/08 by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding H03K5/07 takes precedence; comparing one pulse with another H03K5/22; providing a determined threshold for switching H03K17/30
• CPC Class Codes: H03K 5/1536 Zero-crossing detectors in measuring circuits G01R19/175

Abstract

The detector applies an analog input signal through respectively positive and negative offset voltages to the inputs of two comparators, one of which produces a first output signal as the input signal passes beyond a predetermined minimum voltage in the positive going direction, and the other of which produces a second output signal when the input voltage exceeds a minimum predetermined value in a negative going direction. The input signal is also applied directly to the input of a third comparator the output of which produces a third signal each time the input signal crosses over zero voltage in a positive going direction. The first and second comparator output signals are applied to the reset and set terminals, respectively, of a first flip flop. The output of this first flip flop, and the output of the third comparator are applied through an AND gate to the set terminal of a second flip flop. The second flip flop produces at its output a digital signal precisely at the time that a signal is produced at the output of the third comparator, provided the outputs of the first and second comparators have been successively generated in the cycle of the input voltage immediately preceding the output signal of the third comparator.

Claims

1. A zero crossover detector for sensing an analog input signal and for producing a digital output signal at the exact moment that the analog input signal crosses through zero voltage, comprising

first means for sensing an analog input signal and operative intermittently to generate a first binary output signal each time said input signal exceeds a predetermined voltage while going in one direction,

second means for sensing said analog input signal and operative intermittently to generate a second binary output signal each time said input signal exceeds a predetermined voltage while going in the opposite direction,

third means for sensing said analog input signal and operative for each cycle thereof to generate a third binary signal coincident with a zero voltage crossover of said input signal, and

means connected to said sensing means and responsive to each generation of said third binary signal to produce a digital output signal coincident with said zero crossover of said input signal, provided that each of said first and second binary signals is generated in a cycle of said input signal preceding generation of said third binary signal.

2. A zero crossover detector as defined in claim 1, wherein both said first and second binary signals are generated in the cycle of said input signal immediately preceding generation of said third binary signal.

3. A zero crossover detector as defined in claim 1, wherein said sensing means are operative successively to generate said first, second and third binary signals.

4. A zero crossover detector as defined in claim 1, wherein each of said first and second sensing means includes means for adding a fixed voltage to said analog input signal to establish said predetermined voltages in said one and said opposite direction, respectively.

5. A zero crossover detector as defined in claim 4, wherein each of said fixed voltages has a value slightly less than the minimum value of the analog input signal which is to be sensed by the detector.

6. A zero crossover detector as defined in claim 1, wherein

each of said sensing means includes a differential amplifier having two inputs and one output,

each of two of such amplifiers has one of its inputs connected directly to said analog input signal, and has its other input connected through a supplemental voltage source to said input signal, whereby the respective output signals of said two amplifiers are not produced until predetermined minimum times after said input signal has crossed over zero in positive and negative going directions, respectively, and

the third amplifier has each of its inputs connected directly to said analog input signal, whereby its output signal is produced each time said input signal crosses zero in a positive going direction.

7. A zero crossover detector as defined in claim 6, wherein

one of said inputs of each of said amplifiers is a signal inverting input, and the other input of each of said amplifiers is a signal non-inverting input, and

one of said other inputs of said two amplifiers is non-signal inverting and is connected through a positive supplemental voltage source to said input signal, and

the other of said other inputs of said two amplifiers is signal inverting and is connected through a negative supplemental voltage source to said input signal.

8. A zero crossover detector as defined in claim 7, wherein

said positive and negative supplemental voltage sources are of equal value, and

the voltage of each of said sources is slightly less than the minimum value of the analog input signal which is to be sensed by the detector.

9. A zero crossover detector as defined in claim 1, wherein said means connected to said sensing means comprises,

a first flip flop coupled to the outputs of said first and second sensing means, and having an output disposed to generate a fourth binary signal upon successive generation of said first and second binary signals in a cycle of said input voltage, and

a second flip flop coupled to the outputs of said third sensing means and said first flip flop, and having an output operative, upon simultaneous generation of said third and said fourth binary signals, to produce said digital output signal.

10. A zero crossover detector as defined in claim 9, wherein

the outputs of said first and second sensing means are connected to set and reset terminals, respectively, of said first flip flop, and

said third and fourth binary signals are applied through an AND gate to a set terminal on said second flip flop.

11. A method of sensing an analog input signal and for producing a substantially noise free digital output signal at the exact moment that the analog input signal crosses through zero voltage, comprising

sensing an analog input signal,

generating a first binary signal after said input signal has exceeded a first predetermined minimum voltage in a positive going direction during each cycle thereof,

generating a second binary signal after said input signal has exceeded a second predetermined minimum voltage in a negative going direction during each cycle thereof,

generating a third binary signal at the end of each cycle of said input voltage at the moment that the input voltage passes through zero in a positive going direction,

momentarily generating a fourth binary signal upon successive generation of said first and second binary signals in a given cycle of said input signal, and

generating a digital output signal concurrently with said third binary signal each time said third binary signal is generated in the presence of said fourth binary signal.

12. A method as defined in claim 11, wherein

generating said first binary signal includes adding to said input signal a positive voltage to establish said first predetermined minimum voltage, and

generating said second binary signal includes adding to said input signal a negative voltage to establish said second predetermined minimum voltage.

13. A method as defined in claim 12, wherein said positive and negative voltages are equal and are slightly less than the minimum value of the analog input voltage that is to be sensed.