Multichannel communication processing system

• US 5,278,836 A
• Filed: 03/15/1991
• Issued: 01/11/1994
• Est. Priority Date: 03/15/1990
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Miki, Sakae, Iimura, Kenji, Kawakita, Kenji
• Primary Examiner(s): Olms, Douglas W.
• Assistant Examiner(s): HOM, SHICK C
• Application Number:
  US07/669,974
• Time in Patent Office: 1,033 Days
• Field of Search: 370/112, 370/110.1, 370/85.1, 370/67, 370/58.1, 370/58.2, 370/58.3, 370/77, 340/825.5, 340/825.06, 379/88, 379/196
• US Class Current: 370/464
• CPC Class Codes: H04L 12/56 Packet switching systems
• CPC Class Codes: H04Q 11/0428 Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals

Abstract

A multichannel communication processing system having line control apparatus means for analyzing receiving frames and channel-controlling transmitting frames, DMA control apparatus for transferring the data not via a host processor but directly to a main memory, a memory for storing a variety of data and a communication protocol processing program, a CPU for controlling the communication processing system as a whole and line correspondence apparatus including line correspondence units provided between the lines and the line control apparatus whereby serial interfaces with channels of the plurality of lines are effected.

Claims

1. A multichannel communication processing system, in a communications exchange for simultaneously executing communications on a plurality of lines, comprising:

a line control means for analyzing receiving frames simultaneously received through a plurality of lines and channel-controlling transmitting frames simultaneously transmitted through said lines;

a DMA control means for transferring frames not via a host processor but directly to a main memory;

a memory for storing a variety of data and a communication protocol processing program;

a CPU for controlling said communication processing system as whole to effect simultaneous communication processing by use of said data and said communication protocol processing program stored in said memory; and

a line correspondence means including line correspondence units corresponding to said plurality of lines, each line correspondence unit being disposed between a corresponding line and said line control means, each line correspondence unit effects serial interface between a channel of a corresponding line and said line control means.

2. The multichannel communication processing system as set forth in claim 1, wherein each of said line correspondence units includes a data buffer for temporarily storing data, said line control means includes a channel selector for selecting one of said line correspondence units and a register for holding statuses per channel, and said DMA control means includes a register for holding parameters per channel.

3. The multichannel communication processing systems as set forth in claim 1 or 2, wherein data transferred between said CPU, said line control means, said DMA control means and said memory contain channel information.

4. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 1.

5. An exchange equipped with said multichannel communication processing system as set forth in claim 1.

11. The multichannel communication processing system as set forth in claim 1, wherein a data bus dedicated to receiving and a data bus dedicated to transmitting are provided between said line control means and said DMA control means.

12. The multichannel communication processing system as set forth in claim 11, wherein said multichannel communication processing system is constructed of one or a plurality of semiconductor chips.

13. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 12.

14. An exchange equipped with said multichannel communication processing system as set forth in claim 13.

15. The multichannel communication processing system as set forth in claim 2, wherein a data bus dedicated to receiving and a data bus dedicated to transmitting are provided between said line control means and said DMA control means.

16. The multichannel communication processing system as set forth in claim 1, wherein said multichannel communication processing system is constructed of one or a plurality of semiconductor chips.

17. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 16.

18. An exchange equipped with said multichannel communication processing system as set forth in claim 17.

19. The multichannel communication processing system as set forth in claim 3, wherein a data bus dedicated to receiving and a data bus dedicated to transmitting are provided between said line control means and said DMA control means.

20. The multichannel communication processing system as set forth in claim 2, wherein said multichannel communication processing system is constructed of one or a plurality of semiconductor chips.

21. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 1.

22. An exchange equipped with said multichannel communication processing system as set forth in claim 21.

23. The multichannel communication processing system as set forth in claim 3, wherein said multichannel communication processing system is constructed of one or a plurality of semiconductor chips.

24. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 2.

25. An exchange equipped with said multichannel communication processing system as set forth in claim 1.

26. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 3.

27. An exchange equipped with said multichannel communication processing system as set forth in claim 2.

28. An exchange equipped with said multichannel communication processing system as set forth in claim 3.

6. a multichannel communication processing system, a communications exchange for simultaneously executing communications on a plurality of lines, comprising:

line control means for analyzing receiving frames simultaneously received through a plurality of lines and channel-controlling transmitting frames simultaneously transmitted through said lines;

a DMA control means for transferring frames not via a host processor but directly to a main memory;

a memory for storing a variety of data and a communication protocol processing program;

a CPU for controlling said communication processing system as whole to effect simultaneous communication processing by use of said data and said communication protocol processing program stored in said memory;

a line correspondence means including a plurality of line correspondence units corresponding to said plurality of lines, each line correspondence unit being disposed between a corresponding line and said line control means, each line correspondence unit effects serial interface between a respective channel of a corresponding line and said line control means; and

a multiplex control circuit, disposed between said line correspondence means and multiplex transmitting/receiving lines, for separating multiplexed data transmitted from said multiplex transmitting line, simultaneously supplying the data to said line correspondence units, multiplexing en bloc the data from said line correspondence units and simultaneously sending the data to said multiplex transmitting/receiving lines.

7. The multichannel communication processing system as set forth in claim 6, wherein each of said line correspondence units includes a data buffer for temporarily storing the data, said line control means includes a channel selector for selecting each of said line correspondence units and a register for holding statuses per channel, and said DMA control means includes a register for holding parameters per channel.

8. The multichannel communication processing system a set forth in claim 6 or 7, wherein the data transferred between said CPU, said line control means, said DMA control means and said memory contain channel information.

9. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 6.

10. An exchange equipped with said multichannel communication processing system as set forth in claim 6.

29. The multichannel communication processing system as set forth in claim 6, wherein a data bus dedicated to receiving and a data bus dedicated to transmitting are provided between said line control means and said DMA control means.

30. The multichannel communication processing system as set forth in claim 29, wherein said multichannel communication processing system is constructed of one or a plurality of semiconductor chips.

31. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 30.

32. An exchange equipped with said multichannel communication processing system as set forth in claim 31.

33. The multichannel communication processing system as set forth in claim 7, wherein a data bus dedicated to receiving and a data bus dedicated to transmitting are provided between said line control means and said DMA control means.

34. The multichannel communication processing system as set forth in claim 6, wherein said multichannel communication processing system is constructed of one or a plurality of semiconductor chips.

35. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 34.

36. An exchange equipped with said multichannel communicating processing system as set forth in claim 35.

37. The multichannel communication processing system as set forth in claim 8, wherein a data bus dedicated to receiving and a data bus dedicated to transmitting are provided between said line control means and said DMA control means.

38. The multichannel communication processing system as set forth in claim 7, wherein said multichannel communication processing system is constructed of one or a plurality of semiconductor chips.

39. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 6.

40. An exchange equipped with said multichannel communication processing system as set forth in claim 39.

41. The multichannel communication processing system as set forth in claim 8, wherein said multichannel communication processing system is constructed of one or a plurality of semiconductor chips.

42. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 7.

43. An exchange equipped with said multichannel communication processing system as set forth in claim 6.

44. An ISDN communication protocol LSI including said multichannel communication processing system as set forth in claim 8.

45. An exchange equipped with said multichannel communication processing system as set forth in claim 7.

46. An exchange equipped with said multichannel communication processing system as set forth in claim 8.