Arc detection system

• US 5,280,404 A
• Filed: 05/15/1992
• Issued: 01/18/1994
• Est. Priority Date: 05/15/1992
• Status: Expired due to Term

• Current Assignee: Bio-Rad Laboratories Incorporated
• Original Assignee: Bio-Rad Laboratories Incorporated
• Inventors: Ragsdale, Charles W.
• Primary Examiner(s): DeBoer, Todd
• Application Number:
  US07/883,505
• Time in Patent Office: 613 Days
• Field of Search: 361/113, 361/93, 361/2, 361/94, 307/137
• US Class Current: 361/113
• CPC Class Codes: G01R 15/14 Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
• CPC Class Codes: H02H 1/0015 Using arc detectors

Abstract

An arc detector for detecting electrical arcs across a break in a line carrying a current in an electrical system. Normally, the line carries current, but when the line is broken, current doesn'"'"'t flow until an arc occurs across the break. The arc detector detects the break using a current sensor for measuring the current, a filter for filtering out unwanted frequencies, an amplifier for amplifying the remaining frequencies into a substantially square wave, a counter for counting square wave transitions, and a latch to hold a detection signal at an output node when the counter counts a preset number of square wave transitions without being reset by a reset switch or a periodic oscillator.

Claims

1. An arc detector for detecting electrical arcs across a break in a line carrying a current in an electrical system, the line carrying a current when a path is provided for current flow, the path either provided by the line without a break or by an arc across the break in the line, with no current path being provided when the break is present and no arc is present, the arc detector comprising:

a current sensor coupled to the line carrying the current, for measuring a current amplitude and providing a current signal proportional to said current amplitude;

a filtering amplifier for amplifying only desired frequency components of said current signal into an amplified signal and for rejecting unwanted low frequency components, wherein arc pulses form steep clock edges in said amplified signal; and

an accumulator, coupled to an output of said filtering amplifier and having a reset input, for counting said steep clock edges in said amplified signal, said accumulator asserting a detection signal at an output node when said accumulator accumulates a predetermined threshold number of clock edges, said accumulator beginning an accumulation of clock edges after a reset signal is asserted at said reset input to said accumulator.

2. An arc detector for detecting electrical arcs across a break in a line carrying a current in an electrical system, the line carrying a current when a path is provided for current flow, the path either provided by the line without a break or by an arc across the break in the line, with no current path being provided when the break is present and no arc is present, the arc detector comprising:

a current transformer coupled to the line carrying the current, for measuring a current amplitude and providing a current signal proportional to said current amplitude;

a filtering amplifier for amplifying only desired frequency components of said current signal into an amplified signal and for rejecting unwanted low frequency components, wherein arc pulses form steep clock edges in said amplified signal; and

an accumulator, coupled to an output of said filtering amplifier and having a reset input, for counting said steep clock edges in said amplified signal, said accumulator asserting a detection signal at an output node when said accumulator accumulates a predetermined threshold number of clock edges, said accumulator beginning an accumulation of clock edges after a reset signal is asserted at said reset input to said accumulator.

3. The arc detection circuit of claim 2, further comprising a disabling means, coupled to said output node, for disabling a flow of current through the line carrying current in the electrical system in response to the assertion of the detection signal at said output node by said accumulator.

4. An arc detector for detecting electrical arcs across a break in a line carrying a current in an electrical system, the line carrying a current when a path is provided for current flow, the path either provided by the line without a break or by an arc across the break in the line, with no current path being provided when the break is present and no arc is present, the arc detector comprising:

a current sensor coupled to the line carrying the current, for measuring a current amplitude and providing a current signal proportional to said current amplitude;

a filter for filtering out unwanted frequency components from said current signal;

an amplifier for amplifying said current signal into an amplified signal by a factor sufficient that desired frequency components which were not filtered out of said current signal by said filter form steep clock edges in said amplified signal;

a counter, coupled at a clock input to said amplifier and having a reset input, for counting said steep clock edges in said amplified signal, said counter asserting a detection signal at an output node when said counter counts up to a predetermined threshold number, said counter beginning a count to said predetermined threshold number after a reset signal is asserted at said reset input;

a reset circuit coupled to said reset input for resetting said counter in response to any one of a set of predetermined reset conditions; and

a latching circuit coupled to said output node and said counter for disabling said clock input when said detection signal is asserted.

5. The arc detection circuit of claim 4, wherein said desired frequency components are in a range from about 1 kilohertz to about 10 kilohertz.

6. The arc detection circuit of claim 4, further comprising a solid state relay coupled in series with the line carrying current in the electrical system, said solid state relay also coupled to said output node, wherein said solid state relay causes an open circuit in the line carrying current when said detection signal is asserted and wherein said solid state relay causes a closed circuit in the line carrying current when said detection signal is not asserted.

7. The arc detection circuit of claim 4, wherein said current sensor is a current transformer coiled around the line carrying current.

8. The arc detection circuit of claim 4, wherein the arc detection circuit is employed in a power supply, wherein said power supply provides a flow of power to the electrical system, and wherein an assertion of detection signal causes said power supply to stop said flow of power to the electrical system.

9. The arc detection circuit of claim 4, wherein the arc detection circuit is coupled to a power line, wherein said power line socket provides a flow of power to the electrical system, and wherein an assertion of said detection signal indicates the presence of arcs in the electrical system and said assertion of said detection signal causes said flow of power to the electrical system to stop.

10. The arc detection circuit of claim 4, wherein the arc detection circuit is coupled to a power line socket, wherein said power line socket provides a flow of power through said power line socket, and wherein an assertion of said detection signal detects arcs in an electrical system connected to said power line socket and said assertion of said detection signal causes said relay to be an open circuit, thereby stopping said flow of power to said power line socket, said relay also forming part of a ground-fault interruption detection circuit.

11. The arc detection circuit of claim 4, wherein said set of predetermined reset conditions comprises a manual reset condition which exists when a reset switch is pressed, a power on condition which exists for a predetermined reset period after power is supplied to the arc detection circuit, and a time out condition which exists when a predetermined counting period passes without said counter counting up to said predetermined threshold number.

12. The arc detection circuit of claim 11 further comprising a second latching circuit for disabling a time out signal, wherein said time out signal is asserted when said time out condition exists, said second latching circuit disabling said time out signal in response to the assertion of said detection signal.

13. The arc detection circuit of claim 11, wherein said power up reset condition is determined by a capacitor and resistor in series, said capacitor and said resistor together characterized by a time constant, and wherein said predetermined reset period is determined by said time constant.