Power MOSFET driver with cross-conduction current reduction

• US 5,281,862 A
• Filed: 10/13/1992
• Issued: 01/25/1994
• Est. Priority Date: 07/09/1991
• Status: Expired due to Term

• Current Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Original Assignee: Micro Linear Corporation (Qorvo, Inc.)
• Inventors: Ma, Bing F.
• Primary Examiner(s): RUBIN, MARGARET R
• Application Number:
  US07/960,246
• Time in Patent Office: 469 Days
• Field of Search: 307/270, 307/263, 307/570-572, 307/254, 307/300, 307/456
• US Class Current: 327/108
• CPC Class Codes: H02M 1/38 Means for preventing simultaneous conduction of switches
• CPC Class Codes: H03K 17/16 Modifications for eliminating interference voltages or currents
• CPC Class Codes: H03K 17/6877 the control circuit comprising active elements different from those used in the output circuit
• CPC Class Codes: H03K 19/001 in bipolar transistor circuits

Abstract

An output circuit includes a totem-pole output circuit for driving a power MOSFET. A pull-up circuit and a pull-down circuit drive the output node low or high as required. The circuit prevents the pull-up and pull-down circuits from simultaneously conducting current. The pull-up circuit has a pull-up threshold voltage and the pull-down circuit has a pull-down threshold voltage such that the pull-up circuit is turned off before the pull-down circuit is activated when the output node is switched from a high state to a low state and further wherein the pull-down circuit is turned off before the pull-up circuit is activated when the output node switches from a low state to a high state. The pull-up circuit is held off when the output node is switched from a high state to a low state by two diodes from the output node to an input of the pull-up circuit. The diodes are connected in series, one diode having its anode coupled to the output node and the cathode of the other diode coupled to the input of pull-up circuit. The pull-down circuit is cut off before the pull-up Darlington drives the output from low to high by having the pull-down threshold higher than the pull-up threshold. A resistor connected between the base of the controlling transistor for the pull-up Darlington and the ground shortens the output low-to-high propagation delay time and the output rise time by shunting transient parasitic capacitance current of the pull-up controlling transistor to the ground.

Claims

1. An output circuit comprising a totem-pole output circuit with an output node having a high state and a low state having a pull-up circuit having a pull-up threshold voltage and including a voltage clamping circuit coupled to prevent damage to the pull-up circuit during a transition from the high state to the low state and a pull-down circuit having a pull-down threshold voltage and a clamping circuit coupled to prevent damage to the pull-down circuit when the output is in the low state comprising means for preventing the pull-up and pull-down circuits from simultaneously conducting current such that the pull-up circuit is turned off before the pull-down circuit is turned on when the output node switches form a high state to a low state and further wherein the pull-down circuit is turned off before the pull-up circuit is turned on when the output node switches from a low state to a high state;

the output circuit further comprising a V_BE -independent current supply for generating a non-conducting dead time interval relatively independent of temperature.

2. The circuit according to claim 1 wherein the pull-up circuit is turned off before the pull-down circuit is turned on by holding he pull-up circuit off when the output node goes from a high state to a low state by one or more diodes coupled in series from the output node to an input of the pull-up circuit.

3. The circuit according to claim 1 wherein the pull-down threshold is greater than the pull-up threshold so that the pull-down circuit is shut off before the output node is driven from a low state to a high.

4. The circuit according to claim 3 wherein the pull-up circuit has a resistor coupled to shunt the parasitic capacitance current to ground to speed up output low-to-high transition.

5. An output circuit comprising:

a. an output node having a high state and a low state;

b. a pull-up circuit coupled to the output node having a pull-up threshold voltage and including a clamping circuit coupled to prevent damage to the pull-up circuit during a transition from the high state to the low state and a resistor coupled to shunt the parasitic capacitance current to ground to speed up output during a low-to-high transition;

c. a pull-down circuit coupled to the output node having a pull-down threshold voltage and including a clamping circuit coupled to prevent damage to the pull-down circuit when the output is in the low state, wherein the pull-down threshold is greater than the pull-up threshold so that the pull-down circuit is shut off before the output node is driven from a low state to a high state; and

d. means for preventing the pull-up and pull-down circuits from simultaneously conducting current such that the pull-up circuit is turned off before the pull-down circuit is turned on when the output node switches from a high state to a low state and further wherein the pull-down circuit is turned off before the pull-up circuit is turned on when the output node switches from a low state to a high state.

6. The output circuit as claimed in claim 5 wherein the pull-up circuit is turned off before the pull-down circuit is turned on by holding the pull-up circuit off when the output node goes from a high state to a low state by one or more diodes coupled in series from the output node to an input of the pull-up circuit.

7. A totem-pole output circuit coupled to a power supply, a circuit ground and a field-effect transistor having a gate, a drain, and a source, said drain coupled to a load and said source coupled to the circuit ground, wherein said output circuit comprises:

a. an output node coupled to the gate of the field effect transistor for controlling said transistor;

b. a first resistor having a first terminal A and a first terminal B and a second resistor having a second terminal A and a second terminal B, the first terminal A coupled to the second terminal A forming an input node;

c. a first transistor having a first base, a first emitter and a first collector, the first base coupled to the first terminal B and the first emitter coupled to the circuit ground;

d. a first current source coupled to the power supply and to the first collector;

e. a first diode having a first anode and a first cathode and a second diode having a second anode and a second cathode, the first cathode coupled to the second anode, the first collector and the first current source and the first anode coupled to the second cathode;

f. a second transistor having a second base, a second emitter and a second collector, the second base coupled to the first anode and the second cathode;

g. a third transistor having a third base, a third emitter and a third collector, the third base coupled to the second terminal B, the third emitter coupled to the circuit ground and the third collector coupled to the second emitter;

h. a third resistor having a third terminal A and a third terminal B, the third terminal A coupled to the first current source, the first collector, the first cathode and the second anode;

i. a fourth resistor having a fourth terminal A and a fourth terminal B, the fourth terminal A coupled to the third terminal B and the fourth terminal B coupled to the circuit ground;

j. a third diode having a third anode and a third cathode and a fourth diode having a fourth anode and a fourth cathode, the fourth anode coupled to the third cathode and to the second collector and the third anode coupled to the fourth cathode;

k. a second current source coupled to the power supply and to the second collector, the third cathode and the fourth anode;

l. a third current source coupled to the power supply;

m. a fourth transistor having a fourth base, a fourth emitter and a fourth collector, the fourth base coupled to the third terminal B and the fourth terminal A, the fourth emitter coupled to the circuit ground and the fourth collector coupled to the third current source;

n. a fifth transistor having a fifth base, a fifth emitter and a fifth collector, the fifth base coupled to the second emitter and the third collector, the fifth emitter coupled to the circuit ground and the fifth collector coupled to the third anode, the fourth cathode and the output node;

o. a fifth diode having a fifth anode and a fifth cathode, the fifth anode coupled to the output node;

p. a sixth diode having a sixth anode and a sixth cathode, the sixth anode coupled to the fifth cathode and the sixth cathode coupled to the third current source and the fourth collector;

q. a fifth resistor having a fifth terminal A and a fifth terminal B, the fifth terminal A coupled to the fifth cathode and the sixth anode and the fifth terminal B coupled to the fifth anode and the output node;

r. a sixth transistor having a sixth base, a sixth emitter and a sixth collector, the sixth collector coupled to the power supply, the sixth base coupled to the third current source, the sixth cathode and the fourth collector and the sixth emitter coupled to the fifth terminal A, the fifth cathode and the sixth anode; and

s. a seventh transistor having a seventh base, a seventh emitter and a seventh collector, the seventh collector coupled to the power supply, the seventh base coupled to the sixth emitter, the fifth terminal A, the fifth cathode and the sixth anode and the seventh emitter coupled to the fifth terminal B, the fifth anode and the output node.

8. The totem-pole output circuit as claimed in claim 7 wherein the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are all Schottky NPN bipolar transistors.

9. The totem-pole output circuit as claimed in claim 8 wherein the sixth transistor and the seventh transistor are both NPN bipolar transistors.

10. An output circuit comprising a totem-pole output circuit with an output node having a high state and a low state having a pull-up circuit having a pull-up threshold voltage and including a voltage clamping circuit coupled to prevent damage to the pull-up circuit during a transition from the high state to the low state and a pull-down circuit having a pull-down threshold voltage and a voltage clamping circuit coupled to prevent damage to the pull-down circuit when the output is in the low state comprising means for preventing the pull-up and pull-down circuits from simultaneously conducting current such that the pull-up circuit is turned off before the pull-down circuit is turned on when the output node switches from a high state to a low state and further wherein the pull-down circuit is turned off before the pull-up circuit is turned on when the output node switches from a low state to a high state, wherein the pull-down threshold is greater than the pull-up threshold so that the pull-down circuit is shut off before the output node is driven from a low state to a high state and the pull-up circuit has a resistor coupled to shunt the parasitic capacitance current to ground to speed up output low-to-high transition.

11. The circuit according to claim 10 wherein the pull-up circuit is turned off before the pull-down circuit is turned on by holding the pull-up circuit off when the output node goes from a high state to a low state by one or more diodes coupled in series from the output node to an input of the pull-up circuit.

12. The output circuit according to claim 10 further comprising a V_BE -dependent current supply for generating a non-conducting dead time interval relatively independent of temperature.

13. An output circuit comprising a totem-pole output circuit with an output node having a high state and a low state having a pull-up circuit input node, the pull-up circuit including a first diode and a second diode serially coupled to each other having a first diode anode coupled to the output node and a second diode cathode coupled tot he pull-up circuit input node for preventing damage to the pull-up circuit by clamping the voltage between the output node and the pull-up circuit input node during a transition from the high state to the low state and a pull-down circuit having a pull-down threshold voltage, including a third diode coupled in series with the pull-down circuit having its anode coupled to the output node and its cathode coupled to the pull-down circuit and a fourth diode coupled in a reverse parallel orientation to the third diode for preventing damage to the third diode during a transition from the low state to the high state, the output circuit comprising means for preventing the pull-up and pull-down circuits from simultaneously conducting current such that the pull-up circuit is turned off before the pull-down circuit is turned on when the output node switches from a high state to a low state and further wherein the pull-down circuit is turned off before the pull-up circuit is turned on when the output node switches from a low state to a high state.

14. The circuit according to claim 13 wherein the pull-up circuit is turned off before the pull-down circuit is turned on by holding the pull-up circuit off when the output node goes from a high state to a low state.

15. The circuit according to claim 13 wherein the pull-down threshold is greater than the pull-up threshold so that the pull-down circuit is shut off before the output node is driven from a low state to a high state.

16. The circuit according to claim 15 wherein the pull-up circuit has a resistor coupled to shunt the parasitic capacitance current to ground to speed up output during a low-to-high transition.

17. The output circuit according to claim 13 further comprising a V_BE -dependent current supply for generating a non-conducting dead time interval relatively independent of temperature.