Microcomputer with high speed access memory and language processing program execution system

• US 5,283,901 A
• Filed: 04/07/1992
• Issued: 02/01/1994
• Est. Priority Date: 04/09/1991
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Masuyama, Hiroyuki
• Primary Examiner(s): Kriess, Kevin A.
• Assistant Examiner(s): Smedley, Richard
• Application Number:
  US07/864,605
• Time in Patent Office: 665 Days
• Field of Search: 395/650, 395/700, 364/300, 364/200
• US Class Current: 717/156
• CPC Class Codes: G06F 8/41 Compilation

Abstract

A microcomputer having a high speed access memory and a language processing program execution system capable of producing a compact object including a high speed variable operation is disclosed. As to an input source program, variable areas used by subroutines are calculated by a variable area analyzing part, and a flow graph of an interrelation of callings of the subroutines is produced by a flow graph producing part. Then, the maximum variable area used by a whole program is calculated from the sizes of the variable areas and the flow graph by a maximum variable area detecting part. When the calculated maximum variable area size of the whole program is smaller than the memory size of the high speed access memory, an output part outputs the object information with variables allocated in the high speed access memory.

Claims

1. A microcomputer having a high speed access memory capable of reading out and writing in data at a high speed and a language processing program execution system for analyzing information of an input source program and outputting object information, the language processing program execution system comprising:

variable memory area analyzing means for calculating variable areas in memory used by subroutines of the source program;

flow graph producing means for producing a flow graph of an interrelation of callings of the subroutines;

maximum variable memory area detecting means for calculating a maximum variable memory area used by a whole program from sizes of the variable memory areas calculated by the variable memory area analyzing means and the flow graph produced by the flow graph producing means; and

output means for outputting the object information with variables allocated in the high speed access memory, when the maximum variable area detecting means is smaller than a memory area of the high speed access memory.

2. The microcomputer as claimed in claim 1, wherein the flow graph includes the subroutines composed of parent and children functions and some of the subroutines are leaf functions, and wherein the maximum variable memory area used by each parent function is calculated by considering a number of either its child or children and the maximum variable memory area used by the whole program is calculated by considering the parent and children functions and the leaf functions in the maximum variable memory area detecting means.